drm/amd/display: Add writeback enable/disable in dc

[WHAT]
The enable and disable writeback calls need to be included in the
coressponding functions in dc_stream.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index 4bdf105d1d7150d666bb2a42eccfd940e7a29a39..e71d622098d7f5f19e621ef61032d29441ceddb7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
@@ -467,6 +467,25 @@ bool dc_stream_add_writeback(struct dc *dc,
                struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst];
                dwb->otg_inst = stream_status->primary_otg_inst;
        }
+
+       if (!dc->hwss.update_bandwidth(dc, dc->current_state)) {
+               dm_error("DC: update_bandwidth failed!\n");
+               return false;
+       }
+
+       /* enable writeback */
+       if (dc->hwss.enable_writeback) {
+               struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst];
+
+               if (dwb->funcs->is_enabled(dwb)) {
+                       /* writeback pipe already enabled, only need to update */
+                       dc->hwss.update_writeback(dc, wb_info, dc->current_state);
+               } else {
+                       /* Enable writeback pipe from scratch*/
+                       dc->hwss.enable_writeback(dc, wb_info, dc->current_state);
+               }
+       }
+
        return true;
 }
 
@@ -511,6 +530,20 @@ bool dc_stream_remove_writeback(struct dc *dc,
        }
        stream->num_wb_info = j;
 
+       /* recalculate and apply DML parameters */
+       if (!dc->hwss.update_bandwidth(dc, dc->current_state)) {
+               dm_error("DC: update_bandwidth failed!\n");
+               return false;
+       }
+
+       /* disable writeback */
+       if (dc->hwss.disable_writeback) {
+               struct dwbc *dwb = dc->res_pool->dwbc[dwb_pipe_inst];
+
+               if (dwb->funcs->is_enabled(dwb))
+                       dc->hwss.disable_writeback(dc, dwb_pipe_inst);
+       }
+
        return true;
 }
 

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
index d71faf2ecd413c3fcc8e06aca2a27f2b8cc4cdb3..fd8a8c10a2019275222bb5e39950262f5ca65c6b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
@@ -367,6 +367,10 @@ void dcn30_enable_writeback(
        DC_LOG_DWB("%s dwb_pipe_inst = %d, mpcc_inst = %d",\
                __func__, wb_info->dwb_pipe_inst,\
                wb_info->mpcc_inst);
+
+       /* Warmup interface */
+       dcn30_mmhubbub_warmup(dc, 1, wb_info);
+
        /* Update writeback pipe */
        dcn30_set_writeback(dc, wb_info, context);