phy: armada-38x: add mux value for gbe port 0 on serdes 0

Armada 38x supports 3 functions on serdes #0:
- pcie port 0
- sata port 0
- gbe port 0

Add missing entry for gbe port 0 on serdes 0 to the gbe_mux array.

Because this array looks obscure to new readers, also add a comment
explaining the meaning of rows, columns and values.

Signed-off-by: Josua Mayer <josua@solid-run.com>
Link: https://lore.kernel.org/r/20240106-fix-a38x-comphy-sd0-gbe0-v1-1-c7fd87272050@solid-run.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/marvell/phy-armada38x-comphy.c b/drivers/phy/marvell/phy-armada38x-comphy.c
index b7d99861526a559fe2aaaed2f22105667a1f0ab7..d3259984ee8ec5a0001d8f244eaa3ac81b68f1d0 100644 (file)
--- a/drivers/phy/marvell/phy-armada38x-comphy.c
+++ b/drivers/phy/marvell/phy-armada38x-comphy.c
@@ -47,8 +47,13 @@ struct a38x_comphy {
        struct a38x_comphy_lane lane[MAX_A38X_COMPHY];
 };
 
+/*
+ * Map serdes lanes and gbe ports to serdes mux configuration values:
+ * row index = serdes lane,
+ * column index = gbe port number.
+ */
 static const u8 gbe_mux[MAX_A38X_COMPHY][MAX_A38X_PORTS] = {
-       { 0, 0, 0 },
+       { 3, 0, 0 },
        { 4, 5, 0 },
        { 0, 4, 0 },
        { 0, 0, 4 },