drm/amd/display: avoid crash and add z8_marks related in dml

[why]
add dml1 used calculate_wm_and_dlg function pointer check to prevent crash.
add z8 watermarks to struct for later asic use

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
index e6220ecf1d7dafba4ee63b3da49a5f66d5b3f61c..88c0b24a32497d853353e00df5a312f11f058b0e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
@@ -2063,7 +2063,8 @@ bool dcn30_validate_bandwidth(struct dc *dc,
        }
 
        DC_FP_START();
-       dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);
+       if (dc->res_pool->funcs->calculate_wm_and_dlg)
+               dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);
        DC_FP_END();
 
        BW_VAL_TRACE_END_WATERMARKS();

diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
index cdaa33707f5c28b2f9ea6c2366f322891c67e31e..82de4fe2637fc136ef41a5ad6b0a08af3ef517ee 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
@@ -1781,8 +1781,8 @@ bool dcn31_validate_bandwidth(struct dc *dc,
                BW_VAL_TRACE_SKIP(fast);
                goto validate_out;
        }
-
-       dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);
+       if (dc->res_pool->funcs->calculate_wm_and_dlg)
+               dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);
 
        BW_VAL_TRACE_END_WATERMARKS();
 

diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
index 4e09ba4f280628d1257ba2e635587a1e8eed6631..1c1fb2fa082296908074f93b350d64259bf9f99f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
@@ -1740,8 +1740,8 @@ bool dcn314_validate_bandwidth(struct dc *dc,
                BW_VAL_TRACE_SKIP(fast);
                goto validate_out;
        }
-
-       dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);
+       if (dc->res_pool->funcs->calculate_wm_and_dlg)
+               dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel);
 
        BW_VAL_TRACE_END_WATERMARKS();
 

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
index aaa29361384672d3886005c67f96c7aba5aa39f7..f5677dbb4e7d894c2e60373f1c756618df74d633 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
@@ -49,6 +49,8 @@ struct dcn_hubbub_wm_set {
        uint32_t dram_clk_change;
        uint32_t usr_retrain;
        uint32_t fclk_pstate_change;
+       uint32_t sr_enter_exit_Z8;
+       uint32_t sr_enter_Z8;
 };
 
 struct dcn_hubbub_wm {