drm/tegra: dc: rgb: Move PCLK shifter programming to CRTC

Asus TF700T tablet uses TC358768 DPI->DSI bridge that sits between Tegra's
DPI output and display panel input. Bridge requires to have stable PCLK
output before RGB encoder is enabled because it uses PCLK by itself to
clock internal logic and bridge is programmed before Tegra's encoder is
enabled. Hence the PCLK clock shifter must be programmed when CRTC is
enabled, otherwise clock is unstable and bridge hangs because of it.
Move the shifter programming from RGB encoder into CRTC.

Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> #TF700T
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 6d1c8cc8b507e4554cad5f6d12ff8e5716600fc6..e62b091b93f223ee9ad39dec9f3d6d4c007fe0cc 100644 (file)
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -2179,6 +2179,12 @@ static void tegra_crtc_atomic_enable(struct drm_crtc *crtc,
                tegra_dc_writel(dc, value, DC_COM_RG_UNDERFLOW);
        }
 
+       if (dc->rgb) {
+               /* XXX: parameterize? */
+               value = SC0_H_QUALIFIER_NONE | SC1_H_QUALIFIER_NONE;
+               tegra_dc_writel(dc, value, DC_DISP_SHIFT_CLOCK_OPTIONS);
+       }
+
        tegra_dc_commit(dc);
 
        drm_crtc_vblank_on(crtc);

diff --git a/drivers/gpu/drm/tegra/rgb.c b/drivers/gpu/drm/tegra/rgb.c
index 606c78a2b988f1756048baae69734962250e52b2..933e14e4609f0dc83e4a986c2e1eaa63bd89bb16 100644 (file)
--- a/drivers/gpu/drm/tegra/rgb.c
+++ b/drivers/gpu/drm/tegra/rgb.c
@@ -116,10 +116,6 @@ static void tegra_rgb_encoder_enable(struct drm_encoder *encoder)
                DISP_ORDER_RED_BLUE;
        tegra_dc_writel(rgb->dc, value, DC_DISP_DISP_INTERFACE_CONTROL);
 
-       /* XXX: parameterize? */
-       value = SC0_H_QUALIFIER_NONE | SC1_H_QUALIFIER_NONE;
-       tegra_dc_writel(rgb->dc, value, DC_DISP_SHIFT_CLOCK_OPTIONS);
-
        tegra_dc_commit(rgb->dc);
 }