ARM: dts: ZII: Disable HW Ethernet switch reset GPIOs
authorChris Healy <cphealy@gmail.com>
Wed, 22 Jul 2020 20:33:41 +0000 (13:33 -0700)
committerShawn Guo <shawnguo@kernel.org>
Mon, 17 Aug 2020 13:28:42 +0000 (21:28 +0800)
Disable Ethernet switch reset GPIO with ZII platforms that have it
enabled.  HW switch reset results in a reset of the copper PHYs
inside of the switch.  We want to avoid this reset of the copper PHYs
in the switch as this results in unnecessary broader network disruption on
a soft reboot of the application processor.

With the HW GPIO removed, the switch driver still performs a soft reset of
the switch core which has been shown to sufficiently meet our needs with
other ZII platforms that do not have the HW switch reset GPIO defined.

Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/vf610-zii-cfu1.dts
arch/arm/boot/dts/vf610-zii-spb4.dts
arch/arm/boot/dts/vf610-zii-ssmb-dtu.dts
arch/arm/boot/dts/vf610-zii-ssmb-spu3.dts

index 64e0e95092266278722fca3b7815ab2c86aa6cf2..50da0c94e1b7f61ba8bdfc5c99cfeadc28dd02a7 100644 (file)
                        interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
-                       reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
 
                        ports {
                                #address-cells = <1>;
        pinctrl_switch: switch-grp {
                fsl,pins = <
                        VF610_PAD_PTB28__GPIO_98                0x3061
-                       VF610_PAD_PTE2__GPIO_107                0x1042
                >;
        };
 
index 9e5187ba3fa6f9f0e5951057d3355c17dd22971b..6c6ec46fd0154c492ffcbb566292017c9c3b617d 100644 (file)
                        pinctrl-names = "default";
                        reg = <0>;
                        eeprom-length = <65536>;
-                       reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
                        interrupt-parent = <&gpio3>;
                        interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-controller;
 
        pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
                fsl,pins = <
-                       VF610_PAD_PTE2__GPIO_107                0x31c2
                        VF610_PAD_PTB28__GPIO_98                0x219d
                >;
        };
index 569614b08f048fc935ff650e8379732638a0dd97..73fdace4cb42470b33aa9593a3cfb4792cc5ad69 100644 (file)
                        pinctrl-names = "default";
                        reg = <0>;
                        eeprom-length = <65536>;
-                       reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
                        interrupt-parent = <&gpio3>;
                        interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-controller;
 
        pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
                fsl,pins = <
-                       VF610_PAD_PTE2__GPIO_107                0x31c2
                        VF610_PAD_PTB28__GPIO_98                0x219d
                >;
        };
index b6b0f302b7b4db5a890044da00a313d8b4853c16..fe600ab2e4bd0a2d81053a66e012ac952beed942 100644 (file)
                        pinctrl-names = "default";
                        reg = <0>;
                        eeprom-length = <65536>;
-                       reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
                        interrupt-parent = <&gpio3>;
                        interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-controller;
 
        pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
                fsl,pins = <
-                       VF610_PAD_PTE2__GPIO_107                0x31c2
                        VF610_PAD_PTB28__GPIO_98                0x219d
                >;
        };