arm64: zynqmp: Fix usb node drive strength and slew rate

As per design, all input/rx pins should have fast slew rate and 12mA
drive strength. Rest all pins should be slow slew rate and 4mA drive
strength. Fix usb nodes as per this and remove setting of slow slew rate
for all the usb group pins.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/379071f44ceb27a0e32d74e13221640922d989d1.1684767562.git.michal.simek@amd.com

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
index 669fe6084f3ff3ef17769ca26af625c68d23c94e..603839c8259917a07d81d423ffe3147850d2bffa 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
@@ -2,7 +2,8 @@
 /*
  * dts file for KV260 revA Carrier Card
  *
- * (C) Copyright 2020 - 2021, Xilinx, Inc.
+ * (C) Copyright 2020 - 2022, Xilinx, Inc.
+ * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
  *
  * SD level shifter:
  * "A" - A01 board un-modified (NXP)
@@ -265,19 +266,22 @@
        pinctrl_usb0_default: usb0-default {
                conf {
                        groups = "usb0_0_grp";
-                       slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                };
 
                conf-rx {
                        pins = "MIO52", "MIO53", "MIO55";
                        bias-high-impedance;
+                       drive-strength = <12>;
+                       slew-rate = <SLEW_RATE_FAST>;
                };
 
                conf-tx {
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                        "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       drive-strength = <4>;
+                       slew-rate = <SLEW_RATE_SLOW>;
                };
 
                mux {

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
index 7886a19139eeb2bf465f2ef14a579eab6bc20bcd..a91d09e7da4bca14916e588b4a0b4231a765fb5c 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
@@ -2,7 +2,8 @@
 /*
  * dts file for KV260 revA Carrier Card
  *
- * (C) Copyright 2020 - 2021, Xilinx, Inc.
+ * (C) Copyright 2020 - 2022, Xilinx, Inc.
+ * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
  *
  * Michal Simek <michal.simek@amd.com>
  */
@@ -248,19 +249,22 @@
        pinctrl_usb0_default: usb0-default {
                conf {
                        groups = "usb0_0_grp";
-                       slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                };
 
                conf-rx {
                        pins = "MIO52", "MIO53", "MIO55";
                        bias-high-impedance;
+                       drive-strength = <12>;
+                       slew-rate = <SLEW_RATE_FAST>;
                };
 
                conf-tx {
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                        "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       drive-strength = <4>;
+                       slew-rate = <SLEW_RATE_SLOW>;
                };
 
                mux {

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
index 1a7995ee62ce0ff5aa797b3740b36d767baf967a..af3331c133ad44c94536bd4ed6a6b5d86da125ae 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
@@ -2,7 +2,8 @@
 /*
  * dts file for Xilinx ZynqMP zc1751-xm015-dc1
  *
- * (C) Copyright 2015 - 2021, Xilinx, Inc.
+ * (C) Copyright 2015 - 2022, Xilinx, Inc.
+ * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
  *
  * Michal Simek <michal.simek@amd.com>
  */
@@ -187,19 +188,22 @@
 
                conf {
                        groups = "usb0_0_grp";
-                       slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                };
 
                conf-rx {
                        pins = "MIO52", "MIO53", "MIO55";
                        bias-high-impedance;
+                       drive-strength = <12>;
+                       slew-rate = <SLEW_RATE_FAST>;
                };
 
                conf-tx {
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                               "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       drive-strength = <4>;
+                       slew-rate = <SLEW_RATE_SLOW>;
                };
        };
 

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
index 869b733a0634891d3338dd6f665ec9dae29bd1bb..6503f4985f8d67dbafdcc7e24b147372e2f28990 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
@@ -2,7 +2,8 @@
 /*
  * dts file for Xilinx ZynqMP zc1751-xm016-dc2
  *
- * (C) Copyright 2015 - 2021, Xilinx, Inc.
+ * (C) Copyright 2015 - 2022, Xilinx, Inc.
+ * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
  *
  * Michal Simek <michal.simek@amd.com>
  */
@@ -281,19 +282,22 @@
 
                conf {
                        groups = "usb1_0_grp";
-                       slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                };
 
                conf-rx {
                        pins = "MIO64", "MIO65", "MIO67";
                        bias-high-impedance;
+                       drive-strength = <12>;
+                       slew-rate = <SLEW_RATE_FAST>;
                };
 
                conf-tx {
                        pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
                               "MIO72", "MIO73", "MIO74", "MIO75";
                        bias-disable;
+                       drive-strength = <4>;
+                       slew-rate = <SLEW_RATE_SLOW>;
                };
        };
 

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
index 544801814bd5d069dcdf5063cd565b1815066aee..44d1f351bb757d8ba648b000cb93dcd95031c626 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
@@ -2,7 +2,8 @@
 /*
  * dts file for Xilinx ZynqMP ZCU100 revC
  *
- * (C) Copyright 2016 - 2021, Xilinx, Inc.
+ * (C) Copyright 2016 - 2022, Xilinx, Inc.
+ * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
  *
  * Michal Simek <michal.simek@amd.com>
  * Nathalie Chan King Choy
@@ -432,19 +433,22 @@
 
                conf {
                        groups = "usb0_0_grp";
-                       slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                };
 
                conf-rx {
                        pins = "MIO52", "MIO53", "MIO55";
                        bias-high-impedance;
+                       drive-strength = <12>;
+                       slew-rate = <SLEW_RATE_FAST>;
                };
 
                conf-tx {
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                               "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       drive-strength = <4>;
+                       slew-rate = <SLEW_RATE_SLOW>;
                };
        };
 
@@ -456,19 +460,22 @@
 
                conf {
                        groups = "usb1_0_grp";
-                       slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                };
 
                conf-rx {
                        pins = "MIO64", "MIO65", "MIO67";
                        bias-high-impedance;
+                       drive-strength = <12>;
+                       slew-rate = <SLEW_RATE_FAST>;
                };
 
                conf-tx {
                        pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
                               "MIO72", "MIO73", "MIO74", "MIO75";
                        bias-disable;
+                       drive-strength = <4>;
+                       slew-rate = <SLEW_RATE_SLOW>;
                };
        };
 };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
index f36353a51863357c510e7c922aaf28c4595c3854..a074d8e2b86d27ca1118cb70365f2d6d87d45376 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
@@ -783,19 +783,22 @@
 
                conf {
                        groups = "usb0_0_grp";
-                       slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                };
 
                conf-rx {
                        pins = "MIO52", "MIO53", "MIO55";
                        bias-high-impedance;
+                       drive-strength = <12>;
+                       slew-rate = <SLEW_RATE_FAST>;
                };
 
                conf-tx {
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                               "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       drive-strength = <4>;
+                       slew-rate = <SLEW_RATE_SLOW>;
                };
        };
 

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
index 3fd47725c2c84566e577068adf0030580f1331dc..91c9b77f6b1ff726b15f2fdef8e02e477fb88f50 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
@@ -410,20 +410,22 @@
 
                conf {
                        groups = "usb0_0_grp";
-                       slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
-                       drive-strength = <12>;
                };
 
                conf-rx {
                        pins = "MIO52", "MIO53", "MIO55";
                        bias-high-impedance;
+                       drive-strength = <12>;
+                       slew-rate = <SLEW_RATE_FAST>;
                };
 
                conf-tx {
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                               "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       drive-strength = <4>;
+                       slew-rate = <SLEW_RATE_SLOW>;
                };
        };
 };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
index 4f6429caecff21581a29e837d5e0acd5a668a16f..954044d9899f66eee7a9a0defa1908edb20d9012 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
@@ -422,20 +422,22 @@
 
                conf {
                        groups = "usb0_0_grp";
-                       slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
-                       drive-strength = <12>;
                };
 
                conf-rx {
                        pins = "MIO52", "MIO53", "MIO55";
                        bias-high-impedance;
+                       drive-strength = <12>;
+                       slew-rate = <SLEW_RATE_FAST>;
                };
 
                conf-tx {
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                               "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       drive-strength = <4>;
+                       slew-rate = <SLEW_RATE_SLOW>;
                };
        };
 };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
index 8c3fa3fe28d5e414059c5e35a333ebdde05a8ddb..ab5e34b436429342b68f6d42af71740c0cc90121 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
@@ -794,19 +794,22 @@
 
                conf {
                        groups = "usb0_0_grp";
-                       slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                };
 
                conf-rx {
                        pins = "MIO52", "MIO53", "MIO55";
                        bias-high-impedance;
+                       drive-strength = <12>;
+                       slew-rate = <SLEW_RATE_FAST>;
                };
 
                conf-tx {
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                               "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       drive-strength = <4>;
+                       slew-rate = <SLEW_RATE_SLOW>;
                };
        };
 

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
index 0d9b6081dff69d9b62c401264a944e1e5612b1cd..f31365a14f7326f5dac4162a4509547689106474 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
@@ -660,19 +660,22 @@
 
                conf {
                        groups = "usb0_0_grp";
-                       slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                };
 
                conf-rx {
                        pins = "MIO52", "MIO53", "MIO55";
                        bias-high-impedance;
+                       drive-strength = <12>;
+                       slew-rate = <SLEW_RATE_FAST>;
                };
 
                conf-tx {
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                               "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       drive-strength = <4>;
+                       slew-rate = <SLEW_RATE_SLOW>;
                };
        };