arm64: dts: qcom: sm8450: add spmi node

Add the spmi bus as found in the SM8450 SoC

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[Konrad: 0x0 -> 0, move #cells down, make reg-names a vertical list]
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[bjorn: Adjusted unit address]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229103212.984324-1-konrad.dybcio@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 52aa6f1f08f5c8a3fa1b0bbb26f2d5407a2dbc86..3037242fab5863e3727c1ebb82d64cea494fd2f0 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -3004,6 +3004,28 @@
                        #clock-cells = <0>;
                };
 
+               spmi_bus: spmi@c400000 {
+                       compatible = "qcom,spmi-pmic-arb";
+                       reg = <0 0x0c400000 0 0x00003000>,
+                             <0 0x0c500000 0 0x00400000>,
+                             <0 0x0c440000 0 0x00080000>,
+                             <0 0x0c4c0000 0 0x00010000>,
+                             <0 0x0c42d000 0 0x00010000>;
+                       reg-names = "core",
+                                   "chnls",
+                                   "obsrvr",
+                                   "intr",
+                                   "cnfg";
+                       interrupt-names = "periph_irq";
+                       interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+                       qcom,ee = <0>;
+                       qcom,channel = <0>;
+                       interrupt-controller;
+                       #interrupt-cells = <4>;
+                       #address-cells = <2>;
+                       #size-cells = <0>;
+               };
+
                ipcc: mailbox@ed18000 {
                        compatible = "qcom,sm8450-ipcc", "qcom,ipcc";
                        reg = <0 0x0ed18000 0 0x1000>;