uint32_t ta_dtm_size_bytes;
 };
 
+enum ta_fw_type {
+       TA_FW_TYPE_UNKOWN,
+       TA_FW_TYPE_PSP_ASD,
+       TA_FW_TYPE_PSP_XGMI,
+       TA_FW_TYPE_PSP_RAS,
+       TA_FW_TYPE_PSP_HDCP,
+       TA_FW_TYPE_PSP_DTM,
+};
+
+struct ta_fw_bin_desc {
+       uint32_t fw_type;
+       uint32_t fw_version;
+       uint32_t offset_bytes;
+       uint32_t size_bytes;
+};
+
+/* version_major=2, version_minor=0 */
+struct ta_firmware_header_v2_0 {
+       struct common_firmware_header header;
+       uint32_t ta_fw_bin_count;
+       struct ta_fw_bin_desc ta_fw_bin[];
+};
+
 /* version_major=1, version_minor=0 */
 struct gfx_firmware_header_v1_0 {
        struct common_firmware_header header;
        struct psp_firmware_header_v1_1 psp_v1_1;
        struct psp_firmware_header_v1_3 psp_v1_3;
        struct ta_firmware_header_v1_0 ta;
+       struct ta_firmware_header_v2_0 ta_v2_0;
        struct gfx_firmware_header_v1_0 gfx;
        struct rlc_firmware_header_v1_0 rlc;
        struct rlc_firmware_header_v2_0 rlc_v2_0;
        uint8_t raw[0x100];
 };
 
+#define UCODE_MAX_TA_PACKAGING ((sizeof(union amdgpu_firmware_header) - sizeof(struct common_firmware_header) - 4) / sizeof(struct ta_fw_bin_desc))
+
 /*
  * fw loading support
  */