staging: rtl8192u: r8192U_dm: Fix alignment issue.
authorSanjana Sanikommu <sanjana99reddy99@gmail.com>
Tue, 19 Mar 2019 15:23:55 +0000 (20:53 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 20 Mar 2019 06:50:35 +0000 (07:50 +0100)
Ajdust alignment to match open paranthesis.
Issue found by checkpatch.pl

CHECK: Alignment should match open paranthesis.

Signed-off-by: Sanjana Sanikommu <sanjana99reddy99@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8192u/r8192U_dm.c

index 6c9f9d82477db3a746778b6fc8e721f1a7780617..0f1318865dd1e875dd88d37e7a2c8298b8e58595 100644 (file)
@@ -1454,7 +1454,7 @@ static void dm_CCKTxPowerAdjust_ThermalMeter(struct net_device *dev, bool  bInCH
 
                rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
                RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
-                       rCCK0_TxFilter1, TempVal);
+                        rCCK0_TxFilter1, TempVal);
                /* Write 0xa24 ~ 0xa27 */
                TempVal =       CCKSwingTable_Ch14[priv->CCK_index][2] +
                                        (CCKSwingTable_Ch14[priv->CCK_index][3]<<8) +
@@ -1462,14 +1462,14 @@ static void dm_CCKTxPowerAdjust_ThermalMeter(struct net_device *dev, bool  bInCH
                                        (CCKSwingTable_Ch14[priv->CCK_index][5]<<24);
                rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
                RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
-                       rCCK0_TxFilter2, TempVal);
+                        rCCK0_TxFilter2, TempVal);
                /* Write 0xa28  0xa29 */
                TempVal =       CCKSwingTable_Ch14[priv->CCK_index][6] +
                                        (CCKSwingTable_Ch14[priv->CCK_index][7]<<8);
 
                rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
                RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
-                       rCCK0_DebugPort, TempVal);
+                        rCCK0_DebugPort, TempVal);
        }
 }
 
@@ -1520,7 +1520,7 @@ void dm_restore_dynamic_mechanism_state(struct net_device *dev)
                return;
        /* TODO: Only 11n mode is implemented currently, */
        if (!(priv->ieee80211->mode == WIRELESS_MODE_N_24G ||
-               priv->ieee80211->mode == WIRELESS_MODE_N_5G))
+             priv->ieee80211->mode == WIRELESS_MODE_N_5G))
                return;
 
        {
@@ -1751,7 +1751,7 @@ static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(
 
        /* For smooth, we can not change DIG state. */
        if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_low_thresh) &&
-               (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
+           (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
                return;
 
        /*DbgPrint("Dig by Fw False Alarm\n");*/
@@ -1814,7 +1814,7 @@ static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(
                u8 reset_flag = 0;
 
                if (dm_digtable.dig_state == DM_STA_DIG_ON &&
-                       (priv->reset_count == reset_cnt)) {
+                   (priv->reset_count == reset_cnt)) {
                        dm_ctrl_initgain_byrssi_highpwr(dev);
                        return;
                }
@@ -1912,7 +1912,7 @@ static void dm_ctrl_initgain_byrssi_highpwr(
         */
        if (priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_power_highthresh) {
                if (dm_digtable.dig_highpwr_state == DM_STA_DIG_ON &&
-                       (priv->reset_count == reset_cnt_highpwr))
+                   (priv->reset_count == reset_cnt_highpwr))
                        return;
                dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
 
@@ -1928,7 +1928,7 @@ static void dm_ctrl_initgain_byrssi_highpwr(
                        write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
        } else {
                if (dm_digtable.dig_highpwr_state == DM_STA_DIG_OFF &&
-                       (priv->reset_count == reset_cnt_highpwr))
+                   (priv->reset_count == reset_cnt_highpwr))
                        return;
                dm_digtable.dig_highpwr_state = DM_STA_DIG_OFF;
 
@@ -2129,7 +2129,7 @@ static    void dm_cs_ratio(
 
        {
                if ((dm_digtable.precs_ratio_state != dm_digtable.curcs_ratio_state) ||
-                       !initialized || force_write) {
+                   !initialized || force_write) {
                        /*DbgPrint("Write CS_ratio state = %d\n", DM_DigTable.CurCS_ratioState);*/
                        if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_LOWER) {
                                /*  Lower CS ratio for CCK. */
@@ -2646,7 +2646,7 @@ void dm_fsync_timer_callback(struct timer_list *t)
        bool            bDoubleTimeInterval = false;
 
        if (priv->ieee80211->state == IEEE80211_LINKED &&
-               priv->ieee80211->bfsync_enable &&
+           priv->ieee80211->bfsync_enable &&
                (priv->ieee80211->pHTInfo->IOTAction & HT_IOT_ACT_CDD_FSYNC)) {
                /* Count rate 54, MCS [7], [12, 13, 14, 15] */
                u32 rate_bitmap;