rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
                RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
-                       rCCK0_TxFilter1, TempVal);
+                        rCCK0_TxFilter1, TempVal);
                /* Write 0xa24 ~ 0xa27 */
                TempVal =       CCKSwingTable_Ch14[priv->CCK_index][2] +
                                        (CCKSwingTable_Ch14[priv->CCK_index][3]<<8) +
                                        (CCKSwingTable_Ch14[priv->CCK_index][5]<<24);
                rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
                RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
-                       rCCK0_TxFilter2, TempVal);
+                        rCCK0_TxFilter2, TempVal);
                /* Write 0xa28  0xa29 */
                TempVal =       CCKSwingTable_Ch14[priv->CCK_index][6] +
                                        (CCKSwingTable_Ch14[priv->CCK_index][7]<<8);
 
                rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
                RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
-                       rCCK0_DebugPort, TempVal);
+                        rCCK0_DebugPort, TempVal);
        }
 }
 
                return;
        /* TODO: Only 11n mode is implemented currently, */
        if (!(priv->ieee80211->mode == WIRELESS_MODE_N_24G ||
-               priv->ieee80211->mode == WIRELESS_MODE_N_5G))
+             priv->ieee80211->mode == WIRELESS_MODE_N_5G))
                return;
 
        {
 
        /* For smooth, we can not change DIG state. */
        if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_low_thresh) &&
-               (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
+           (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
                return;
 
        /*DbgPrint("Dig by Fw False Alarm\n");*/
                u8 reset_flag = 0;
 
                if (dm_digtable.dig_state == DM_STA_DIG_ON &&
-                       (priv->reset_count == reset_cnt)) {
+                   (priv->reset_count == reset_cnt)) {
                        dm_ctrl_initgain_byrssi_highpwr(dev);
                        return;
                }
         */
        if (priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_power_highthresh) {
                if (dm_digtable.dig_highpwr_state == DM_STA_DIG_ON &&
-                       (priv->reset_count == reset_cnt_highpwr))
+                   (priv->reset_count == reset_cnt_highpwr))
                        return;
                dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
 
                        write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
        } else {
                if (dm_digtable.dig_highpwr_state == DM_STA_DIG_OFF &&
-                       (priv->reset_count == reset_cnt_highpwr))
+                   (priv->reset_count == reset_cnt_highpwr))
                        return;
                dm_digtable.dig_highpwr_state = DM_STA_DIG_OFF;
 
 
        {
                if ((dm_digtable.precs_ratio_state != dm_digtable.curcs_ratio_state) ||
-                       !initialized || force_write) {
+                   !initialized || force_write) {
                        /*DbgPrint("Write CS_ratio state = %d\n", DM_DigTable.CurCS_ratioState);*/
                        if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_LOWER) {
                                /*  Lower CS ratio for CCK. */
        bool            bDoubleTimeInterval = false;
 
        if (priv->ieee80211->state == IEEE80211_LINKED &&
-               priv->ieee80211->bfsync_enable &&
+           priv->ieee80211->bfsync_enable &&
                (priv->ieee80211->pHTInfo->IOTAction & HT_IOT_ACT_CDD_FSYNC)) {
                /* Count rate 54, MCS [7], [12, 13, 14, 15] */
                u32 rate_bitmap;