SSICR::SWSP bit controls WS signal low/high, but in case of TDM
it is inverted. This patch solves this issue.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
        u32 cr_own;
        u32 cr_mode;
        u32 wsr;
+       int is_tdm;
+
+       is_tdm = (rsnd_get_slot_runtime(io) >= 6) ? 1 : 0;
 
        /*
         * always use 32bit system word.
 
        if (rdai->bit_clk_inv)
                cr_own |= SCKP;
-       if (rdai->frm_clk_inv)
+       if (rdai->frm_clk_inv ^ is_tdm)
                cr_own |= SWSP;
        if (rdai->data_alignment)
                cr_own |= SDTA;
         *      rsnd_ssiu_init_gen2()
         */
        wsr = ssi->wsr;
-       if (rsnd_get_slot_runtime(io) >= 6) {
+       if (is_tdm) {
                wsr     |= WS_MODE;
                cr_own  |= CHNL_8;
        }