MIPS: compressed: Use correct instruction for 64 bit code

The code clearing BSS already use macro or use correct instruction
depending if the CPU is 32 bits or 64 bits. However, a few
instructions remained 32 bits only.

By using the accurate MACRO, it is now possible to deal with memory
address beyond 32 bits. As a side effect, when using 64bits processor,
it also divides the loop number needed to clear the BSS by 2.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/boot/compressed/head.S b/arch/mips/boot/compressed/head.S
index 5795d0af1e1b2e9518bc4cbab56a4773c95ba78b..d237a834b85ee5c6a880d61368eae83467efd7e2 100644 (file)
--- a/arch/mips/boot/compressed/head.S
+++ b/arch/mips/boot/compressed/head.S
@@ -25,8 +25,8 @@
        /* Clear BSS */
        PTR_LA  a0, _edata
        PTR_LA  a2, _end
-1:     sw      zero, 0(a0)
-       addiu   a0, a0, 4
+1:     PTR_S   zero, 0(a0)
+       PTR_ADDIU a0, a0, PTRSIZE
        bne     a2, a0, 1b
 
        PTR_LA  a0, (.heap)          /* heap address */