drm/amd/display: Only enumerate top local sink as DP2 output

[WHY]
Many DCN generations only have two HPO link encoders and therefore only
support driving a max of two DP2 PHYs. DP2 MST hubs currently can not
pass 3x display validation as each downstream sink is enumerated as
separate DP2 output.

[HOW]
Count MST hubs once by treating only 1st remote sink in topology as an
encoder.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c
index 33eab80e89a84bd09322179d382ee6ebe1bfae9e..6ba393e5b8ee7ff47a509c59d408c87db6053d2c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c
@@ -157,6 +157,15 @@ bool is_dp2p0_output_encoder(const struct pipe_ctx *pipe_ctx)
 {
        /* If this assert is hit then we have a link encoder dynamic management issue */
        ASSERT(pipe_ctx->stream_res.hpo_dp_stream_enc ? pipe_ctx->link_res.hpo_dp_link_enc != NULL : true);
+
+       /* Count MST hubs once by treating only 1st remote sink in topology as an encoder */
+       if (pipe_ctx->stream->link && pipe_ctx->stream->link->remote_sinks[0]) {
+                       return (pipe_ctx->stream_res.hpo_dp_stream_enc &&
+                               pipe_ctx->link_res.hpo_dp_link_enc &&
+                               dc_is_dp_signal(pipe_ctx->stream->signal) &&
+                               (pipe_ctx->stream->link->remote_sinks[0] == pipe_ctx->stream->sink));
+       }
+
        return (pipe_ctx->stream_res.hpo_dp_stream_enc &&
                pipe_ctx->link_res.hpo_dp_link_enc &&
                dc_is_dp_signal(pipe_ctx->stream->signal));