arm64: dts: ti: k3-am69-sk: Add support for OSPI flash

AM69 SK has S28HS512T OSPI flash connected to MCU OSPI0.
Enable support for the same. Also describe the partition
information according to the offsets in the bootloader.

Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Link: https://lore.kernel.org/r/20240220162527.663394-3-sabiya.d@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index 7afdfbbe956d18db7453b22f56a0f24ad986ab32..50de2a448a3a684ed9034a834cbf5084277270ac 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -486,6 +486,25 @@
 
 };
 
+&wkup_pmx0 {
+       bootph-all;
+       mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
+               pinctrl-single,pins = <
+                       J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */
+                       J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */
+                       J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B33) MCU_OSPI0_D0 */
+                       J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B32) MCU_OSPI0_D1 */
+                       J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (C33) MCU_OSPI0_D2 */
+                       J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (C35) MCU_OSPI0_D3 */
+                       J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D33) MCU_OSPI0_D4 */
+                       J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D34) MCU_OSPI0_D5 */
+                       J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (E34) MCU_OSPI0_D6 */
+                       J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (E33) MCU_OSPI0_D7 */
+                       J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */
+               >;
+       };
+};
+
 &wkup_pmx2 {
        bootph-all;
        pmic_irq_pins_default: pmic-irq-default-pins {
@@ -1122,3 +1141,65 @@
        pinctrl-0 = <&main_mcan7_pins_default>;
        phys = <&transceiver4>;
 };
+
+&ospi0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <8>;
+               spi-rx-bus-width = <8>;
+               spi-max-frequency = <25000000>;
+               cdns,tshsl-ns = <60>;
+               cdns,tsd2d-ns = <60>;
+               cdns,tchsh-ns = <60>;
+               cdns,tslch-ns = <60>;
+               cdns,read-delay = <4>;
+
+               partitions {
+                       bootph-all;
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "ospi.tiboot3";
+                               reg = <0x0 0x100000>;
+                       };
+
+                       partition@100000 {
+                               label = "ospi.tispl";
+                               reg = <0x100000 0x200000>;
+                       };
+
+                       partition@300000 {
+                               label = "ospi.u-boot";
+                               reg = <0x300000 0x400000>;
+                       };
+
+                       partition@700000 {
+                               label = "ospi.env";
+                               reg = <0x700000 0x40000>;
+                       };
+
+                       partition@740000 {
+                               label = "ospi.env.backup";
+                               reg = <0x740000 0x40000>;
+                       };
+
+                       partition@800000 {
+                               label = "ospi.rootfs";
+                               reg = <0x800000 0x37c0000>;
+                       };
+
+                       partition@3fc0000 {
+                               bootph-pre-ram;
+                               label = "ospi.phypattern";
+                               reg = <0x3fc0000 0x40000>;
+                       };
+               };
+       };
+};