drm/amdgpu: add utcl2 poison query for gfxhub

Implement it for gfxhub 1.0 and 1.2.

v2: input logical xcc id for poison query interface.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h
index c7b44aeb671b09bc24705e06cdcf953f03a42704..103a837ccc712b2c7556e5c3ca88230468f76b34 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h
@@ -38,6 +38,8 @@ struct amdgpu_gfxhub_funcs {
        void (*mode2_save_regs)(struct amdgpu_device *adev);
        void (*mode2_restore_regs)(struct amdgpu_device *adev);
        void (*halt)(struct amdgpu_device *adev);
+       bool (*query_utcl2_poison_status)(struct amdgpu_device *adev,
+                       int xcc_id);
 };
 
 struct amdgpu_gfxhub {

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 22175da0e16afefef1fd4df7a0afbfdf3c63f688..d200310d17319a40bca2d3c9547af13440ad6b45 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -443,6 +443,22 @@ static void gfxhub_v1_0_init(struct amdgpu_device *adev)
                mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32;
 }
 
+static bool gfxhub_v1_0_query_utcl2_poison_status(struct amdgpu_device *adev,
+                               int xcc_id)
+{
+       u32 status = 0;
+       struct amdgpu_vmhub *hub;
+
+       if (amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 2))
+               return false;
+
+       hub = &adev->vmhub[AMDGPU_GFXHUB(0)];
+       status = RREG32(hub->vm_l2_pro_fault_status);
+       /* reset page fault status */
+       WREG32_P(hub->vm_l2_pro_fault_cntl, 1, ~1);
+
+       return REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED);
+}
 
 const struct amdgpu_gfxhub_funcs gfxhub_v1_0_funcs = {
        .get_mc_fb_offset = gfxhub_v1_0_get_mc_fb_offset,
@@ -452,4 +468,5 @@ const struct amdgpu_gfxhub_funcs gfxhub_v1_0_funcs = {
        .set_fault_enable_default = gfxhub_v1_0_set_fault_enable_default,
        .init = gfxhub_v1_0_init,
        .get_xgmi_info = gfxhub_v1_1_get_xgmi_info,
+       .query_utcl2_poison_status = gfxhub_v1_0_query_utcl2_poison_status,
 };

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
index 49aecdcee006959491e4dba90058faf35e205fdb..77df8c9cbad2fe057d11b43335707e1ef941d581 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
@@ -620,6 +620,20 @@ static int gfxhub_v1_2_get_xgmi_info(struct amdgpu_device *adev)
        return 0;
 }
 
+static bool gfxhub_v1_2_query_utcl2_poison_status(struct amdgpu_device *adev,
+                               int xcc_id)
+{
+       u32 fed, status;
+
+       status = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regVM_L2_PROTECTION_FAULT_STATUS);
+       fed = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED);
+       /* reset page fault status */
+       WREG32_P(SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id),
+                       regVM_L2_PROTECTION_FAULT_STATUS), 1, ~1);
+
+       return fed;
+}
+
 const struct amdgpu_gfxhub_funcs gfxhub_v1_2_funcs = {
        .get_mc_fb_offset = gfxhub_v1_2_get_mc_fb_offset,
        .setup_vm_pt_regs = gfxhub_v1_2_setup_vm_pt_regs,
@@ -628,6 +642,7 @@ const struct amdgpu_gfxhub_funcs gfxhub_v1_2_funcs = {
        .set_fault_enable_default = gfxhub_v1_2_set_fault_enable_default,
        .init = gfxhub_v1_2_init,
        .get_xgmi_info = gfxhub_v1_2_get_xgmi_info,
+       .query_utcl2_poison_status = gfxhub_v1_2_query_utcl2_poison_status,
 };
 
 static int gfxhub_v1_2_xcp_resume(void *handle, uint32_t inst_mask)