Merge branch 'pci/controller/xilinx-ecam'

- Drop xilinx-nwl updates of bridge bus number fields, since PCI core
  already does that (Thippeswamy Havalige)

- Update xilinx-nwl driver and ECAM size in devicetree example to allow up
  to 256 buses (Thippeswamy Havalige)

* pci/controller/xilinx-ecam:
  PCI: xilinx-nwl: Modify ECAM size to enable support for 256 buses
  PCI: xilinx-nwl: Rename the NWL_ECAM_VALUE_DEFAULT macro
  dt-bindings: PCI: xilinx-nwl: Modify ECAM size in the DT example
  PCI: xilinx-nwl: Remove redundant code that sets Type 1 header fields