dt-bindings: drop Sagar Kadam from SiFive binding maintainership
authorConor Dooley <conor.dooley@microchip.com>
Fri, 17 Feb 2023 18:00:36 +0000 (18:00 +0000)
committerRob Herring <robh@kernel.org>
Tue, 21 Feb 2023 16:22:04 +0000 (10:22 -0600)
Sagar's email listed in maintainers is bouncing as his division was sold
off by the company. I attempted to contact him some days ago on what the
bounce email told me was his new contact information, but am yet to
receive a response.

Paul and Palmer are listed on each of the bindings, both of whom were
alive & well as of Wednesday so the bindings remain maintained.

CC: Sagar Kadam <sagar.kadam@openfive.com>
CC: Sagar Kadam <sagar.kadam@sifive.com>
Link: https://lore.kernel.org/all/785425ca-4000-a7e4-16d6-4d68c91b158d@kernel.org/
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20230217180035.39658-1-conor@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml
Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
Documentation/devicetree/bindings/pwm/pwm-sifive.yaml
Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml

index c3be1b6000072b329482fdba3eaec0b325f886cd..c79e752283aae7a1c309005de4804c40a3ddc903 100644 (file)
@@ -8,7 +8,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI)
 
 maintainers:
-  - Sagar Kadam <sagar.kadam@sifive.com>
   - Paul Walmsley  <paul.walmsley@sifive.com>
 
 description:
index 99e01f4d0a6933acfce4f403554475fba0dbf60a..63bc89e134801d52f3b124ef54813c00b2312740 100644 (file)
@@ -45,7 +45,6 @@ description:
   from S-mode. So add thead,c900-plic to distinguish them.
 
 maintainers:
-  - Sagar Kadam <sagar.kadam@sifive.com>
   - Paul Walmsley  <paul.walmsley@sifive.com>
   - Palmer Dabbelt <palmer@dabbelt.com>
 
index 605c1766dba891ae06da67465442c3bef7c8ef53..bae9931289812e0d40f9a67ba6a06b59a4c8fd2c 100644 (file)
@@ -8,7 +8,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: SiFive PWM controller
 
 maintainers:
-  - Sagar Kadam <sagar.kadam@sifive.com>
   - Paul Walmsley <paul.walmsley@sifive.com>
 
 description:
index bf3f07421f7e5df3e7ca90c88c06290074321650..0551a0d1b3df4670832ea808dcc542f32a8b3eaa 100644 (file)
@@ -8,8 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: SiFive Composable Cache Controller
 
 maintainers:
-  - Sagar Kadam <sagar.kadam@sifive.com>
-  - Paul Walmsley  <paul.walmsley@sifive.com>
+  - Paul Walmsley <paul.walmsley@sifive.com>
 
 description:
   The SiFive Composable Cache Controller is used to provide access to fast copies