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drm/bridge: icn6211: Convert to use maple tree register cache
author
Mark Brown
<broonie@kernel.org>
Sat, 30 Sep 2023 23:46:38 +0000
(
00:46
+0100)
committer
Neil Armstrong
<neil.armstrong@linaro.org>
Mon, 2 Oct 2023 07:09:18 +0000
(09:09 +0200)
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link:
https://patchwork.freedesktop.org/patch/msgid/20231001-drm-chipone-maple-v1-1-fb3ce5a53710@kernel.org
drivers/gpu/drm/bridge/chipone-icn6211.c
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diff --git
a/drivers/gpu/drm/bridge/chipone-icn6211.c
b/drivers/gpu/drm/bridge/chipone-icn6211.c
index d205e755e524ae25f4222f32539c36229df38592..82d23e4df09eb461e91021df55ac8470f25f98d2 100644
(file)
--- a/
drivers/gpu/drm/bridge/chipone-icn6211.c
+++ b/
drivers/gpu/drm/bridge/chipone-icn6211.c
@@
-197,7
+197,7
@@
static const struct regmap_config chipone_regmap_config = {
.val_bits = 8,
.rd_table = &chipone_dsi_readable_table,
.wr_table = &chipone_dsi_writeable_table,
- .cache_type = REGCACHE_
RBTRE
E,
+ .cache_type = REGCACHE_
MAPL
E,
.max_register = MIPI_ATE_STATUS(1),
};