Now that all the SoCs using the tablet reference design DTSI are using the
same pinctrl naming scheme, we can move back the pinctrl phandles to the
main DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
};
&i2c0 {
- pinctrl-0 = <&i2c0_pins>;
-
axp209: pmic@34 {
reg = <0x34>;
interrupts = <0>;
};
&i2c1 {
- pinctrl-0 = <&i2c1_pins>;
-
/*
* The gsl1680 is rated at 400KHz and it will not work reliable at
* 100KHz, this has been confirmed on multiple different q8 tablets.
};
};
-&pwm {
- pinctrl-0 = <&pwm0_pin>;
-};
-
®_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
};
&i2c0 {
- pinctrl-0 = <&i2c0_pins>;
/*
* The gsl1680 is rated at 400KHz and it will not work reliable at
* 100KHz, this has been confirmed on multiple different q8 tablets.
};
};
-&i2c1 {
- pinctrl-0 = <&i2c1_pins>;
-};
-
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
};
};
-&pwm {
- pinctrl-0 = <&pwm0_pin>;
-};
-
&r_rsb {
status = "okay";
&i2c0 {
pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
+ pinctrl-0 = <&i2c0_pins>;
status = "okay";
};
&i2c1 {
pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
+ pinctrl-0 = <&i2c1_pins>;
status = "okay";
};
&pwm {
pinctrl-names = "default";
- pinctrl-0 = <&pwm0_pins>;
+ pinctrl-0 = <&pwm0_pin>;
status = "okay";
};