riscv: dts: renesas: rzfive-smarc-som: Drop deleting interrupt properties from ETH0...

Now that we have enabled IRQC support for RZ/Five SoC switch to interrupt
mode for ethernet0/1 PHYs instead of polling mode.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240403203503.634465-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
index 433ab5c6a626c30fe4d5c751d427629fbfbd87b9..5e808242649ec1768a6262a326be000a4c3d2f98 100644 (file)
--- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
+++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
@@ -6,19 +6,3 @@
  */
 
 #include <arm64/renesas/rzg2ul-smarc-som.dtsi>
-
-#if (!SW_ET0_EN_N)
-&eth0 {
-       phy0: ethernet-phy@7 {
-               /delete-property/ interrupt-parent;
-               /delete-property/ interrupts;
-       };
-};
-#endif
-
-&eth1 {
-       phy1: ethernet-phy@7 {
-               /delete-property/ interrupt-parent;
-               /delete-property/ interrupts;
-       };
-};