arm64: dts: ti: verdin-am62: Improve spi1 chip-select pinctrl

Verdin SPI_1 interface has a dedicated hardware controlled chip select
that is currently configured in the same pinctrl group as MISO/MOSI/CLK,
however it is possible that it can be used only as a standard GPIO be it
a chip select or not.

To maximize flexibility and avoid duplication in the carrier board dts
files move the SPI_1 CS in a dedicated pinctrl and also adds an
additional pinctrl to simplify using SPI_1 CS as a GPIO.

Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20231205184605.35225-2-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
index 5db52f2372534b4bababbe360b367970cb1546a6..6a06724b6d168b1e2beeb8659f5fb03e5f52e589 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
@@ -233,6 +233,13 @@
                >;
        };
 
+       /* Verdin SPI_1 CS as GPIO */
+       pinctrl_qspi1_io4_gpio: main-gpio0-7-default-pins {
+               pinctrl-single,pins = <
+                       AM62X_IOPAD(0x001c, PIN_INPUT, 7) /* (J23) OSPI0_D4.GPIO0_7 */ /* SODIMM 202 */
+               >;
+       };
+
        /* Verdin QSPI_1_CS# as GPIO (conflict with Verdin QSPI_1 interface) */
        pinctrl_qspi1_cs_gpio: main-gpio0-11-default-pins {
                pinctrl-single,pins = <
@@ -599,12 +606,18 @@
        pinctrl_spi1: main-spi1-default-pins {
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x0020, PIN_INPUT, 1) /* (J25) OSPI0_D5.SPI1_CLK */ /* SODIMM 196 */
-                       AM62X_IOPAD(0x001c, PIN_INPUT, 1) /* (J23) OSPI0_D4.SPI1_CS0 */ /* SODIMM 202 */
                        AM62X_IOPAD(0x0024, PIN_INPUT, 1) /* (H25) OSPI0_D6.SPI1_D0  */ /* SODIMM 200 */
                        AM62X_IOPAD(0x0028, PIN_INPUT, 1) /* (J22) OSPI0_D7.SPI1_D1  */ /* SODIMM 198 */
                >;
        };
 
+       /* Verdin SPI_1 CS */
+       pinctrl_spi1_cs0: main-spi1-cs0-default-pins {
+               pinctrl-single,pins = <
+                       AM62X_IOPAD(0x001c, PIN_INPUT, 1) /* (J23) OSPI0_D4.SPI1_CS0 */ /* SODIMM 202 */
+               >;
+       };
+
        /* ETH_25MHz_CLK */
        pinctrl_eth_clock: main-system-clkout0-default-pins {
                pinctrl-single,pins = <
@@ -1278,7 +1291,7 @@
 /* Verdin SPI_1 */
 &main_spi1 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_spi1>;
+       pinctrl-0 = <&pinctrl_spi1>, <&pinctrl_spi1_cs0>;
        ti,pindir-d0-out-d1-in;
        status = "disabled";
 };