arm64: dts: mt8183: Configure CPU cooling

Add two passive trip points at 68°C and 80°C for the CPU temperature.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Michael Kao <michael.kao@mediatek.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index e4a6b625980dc52e25ea5aef8e8fea9dcdd10396..0ff7b67a680623ff5f8a066da6dd9da0bc4e3c32 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -13,6 +13,7 @@
 #include <dt-bindings/power/mt8183-power.h>
 #include <dt-bindings/reset-controller/mt8183-resets.h>
 #include <dt-bindings/phy/phy.h>
+#include <dt-bindings/thermal/thermal.h>
 #include "mt8183-pinfunc.h"
 
 / {
@@ -678,6 +679,61 @@
                                polling-delay = <500>;
                                thermal-sensors = <&thermal 0>;
                                sustainable-power = <5000>;
+
+                               trips {
+                                       threshold: trip-point@0 {
+                                               temperature = <68000>;
+                                               hysteresis = <2000>;
+                                               type = "passive";
+                                       };
+
+                                       target: trip-point@1 {
+                                               temperature = <80000>;
+                                               hysteresis = <2000>;
+                                               type = "passive";
+                                       };
+
+                                       cpu_crit: cpu-crit {
+                                               temperature = <115000>;
+                                               hysteresis = <2000>;
+                                               type = "critical";
+                                       };
+                               };
+
+                               cooling-maps {
+                                       map0 {
+                                               trip = <&target>;
+                                               cooling-device = <&cpu0
+                                                       THERMAL_NO_LIMIT
+                                                       THERMAL_NO_LIMIT>,
+                                                                <&cpu1
+                                                       THERMAL_NO_LIMIT
+                                                       THERMAL_NO_LIMIT>,
+                                                                <&cpu2
+                                                       THERMAL_NO_LIMIT
+                                                       THERMAL_NO_LIMIT>,
+                                                                <&cpu3
+                                                       THERMAL_NO_LIMIT
+                                                       THERMAL_NO_LIMIT>;
+                                               contribution = <3072>;
+                                       };
+                                       map1 {
+                                               trip = <&target>;
+                                               cooling-device = <&cpu4
+                                                       THERMAL_NO_LIMIT
+                                                       THERMAL_NO_LIMIT>,
+                                                                <&cpu5
+                                                       THERMAL_NO_LIMIT
+                                                       THERMAL_NO_LIMIT>,
+                                                                <&cpu6
+                                                       THERMAL_NO_LIMIT
+                                                       THERMAL_NO_LIMIT>,
+                                                                <&cpu7
+                                                       THERMAL_NO_LIMIT
+                                                       THERMAL_NO_LIMIT>;
+                                               contribution = <1024>;
+                                       };
+                               };
                        };
 
                        /* The tzts1 ~ tzts6 don't need to polling */