pmdomain: renesas: rcar-sysc: Add R-Car M3-W power-off delay quirk
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 17 Apr 2024 10:29:25 +0000 (12:29 +0200)
committerUlf Hansson <ulf.hansson@linaro.org>
Thu, 18 Apr 2024 14:52:00 +0000 (16:52 +0200)
R-Car M3-W needs a delay of 1 µs before powering off the A3IR and A3VC
power domains.  Add support for this using a new flag, which indicates
that a power area is subject to this quirk.

Inspired by a patch in the BSP by Dien Pham.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/ecbc3465c598084c904dd3714e2894463094ed9a.1713348705.git.geert+renesas@glider.be
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/pmdomain/renesas/r8a77960-sysc.c
drivers/pmdomain/renesas/rcar-sysc.c
drivers/pmdomain/renesas/rcar-sysc.h

index e6f2c3f961255f40f2bb1d0d4afc29e22cb955c4..2ab3f565d2b0f8893283230c8807c49d4f2576bb 100644 (file)
@@ -32,12 +32,14 @@ static const struct rcar_sysc_area r8a77960_areas[] __initconst = {
        { "ca53-cpu3",  0x200, 3, R8A7796_PD_CA53_CPU3, R8A7796_PD_CA53_SCU,
          PD_CPU_NOCR },
        { "cr7",        0x240, 0, R8A7796_PD_CR7,       R8A7796_PD_ALWAYS_ON },
-       { "a3vc",       0x380, 0, R8A7796_PD_A3VC,      R8A7796_PD_ALWAYS_ON },
+       { "a3vc",       0x380, 0, R8A7796_PD_A3VC,      R8A7796_PD_ALWAYS_ON,
+         PD_OFF_DELAY },
        { "a2vc0",      0x3c0, 0, R8A7796_PD_A2VC0,     R8A7796_PD_A3VC },
        { "a2vc1",      0x3c0, 1, R8A7796_PD_A2VC1,     R8A7796_PD_A3VC },
        { "3dg-a",      0x100, 0, R8A7796_PD_3DG_A,     R8A7796_PD_ALWAYS_ON },
        { "3dg-b",      0x100, 1, R8A7796_PD_3DG_B,     R8A7796_PD_3DG_A },
-       { "a3ir",       0x180, 0, R8A7796_PD_A3IR,      R8A7796_PD_ALWAYS_ON },
+       { "a3ir",       0x180, 0, R8A7796_PD_A3IR,      R8A7796_PD_ALWAYS_ON,
+         PD_OFF_DELAY },
 };
 
 
index a9d92e38fcee902c037c30a91ca1f3aec988c4b2..b99326917330f5f146519403f82dda1027012988 100644 (file)
@@ -90,6 +90,10 @@ static int rcar_sysc_pwr_on_off(const struct rcar_sysc_pd *pd, bool on)
        if (ret)
                return -EAGAIN;
 
+       /* Power-off delay quirk */
+       if (!on && (pd->flags & PD_OFF_DELAY))
+               udelay(1);
+
        /* Submit power shutoff or power resume request */
        iowrite32(BIT(pd->chan_bit), rcar_sysc_base + pd->chan_offs + reg_offs);
 
index 8c4ec36ed7da2f9d3a8ffdee566d0ad4a1966903..07ffce310686b2ce3446e24f3e88878706854edd 100644 (file)
@@ -16,6 +16,7 @@
 #define PD_CPU         BIT(0)  /* Area contains main CPU core */
 #define PD_SCU         BIT(1)  /* Area contains SCU and L2 cache */
 #define PD_NO_CR       BIT(2)  /* Area lacks PWR{ON,OFF}CR registers */
+#define PD_OFF_DELAY   BIT(3)  /* Area is subject to power-off delay quirk */
 
 #define PD_CPU_CR      PD_CPU            /* CPU area has CR (R-Car H1) */
 #define PD_CPU_NOCR    PD_CPU | PD_NO_CR /* CPU area lacks CR (R-Car Gen2/3) */