ARM: dts: aspeed: Add silicon id node
authorJoel Stanley <joel@jms.id.au>
Mon, 21 Sep 2020 09:16:44 +0000 (18:46 +0930)
committerJoel Stanley <joel@jms.id.au>
Fri, 25 Sep 2020 00:44:12 +0000 (10:14 +0930)
This register describes the silicon id and chip unique id. It varies
between CPU revisions, but is always part of the SCU.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20200921091644.133107-4-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
arch/arm/boot/dts/aspeed-g4.dtsi
arch/arm/boot/dts/aspeed-g5.dtsi
arch/arm/boot/dts/aspeed-g6.dtsi

index 82f0213e3a3c320aa99bc89842af242c0e072b21..b3dafbc8cacac0405bc96b27d9120b76bf315d49 100644 (file)
                                        status = "disabled";
                                };
 
+                               silicon-id@7c {
+                                       compatible = "aspeed,ast2400-silicon-id", "aspeed,silicon-id";
+                                       reg = <0x7c 0x4>;
+                               };
+
                                pinctrl: pinctrl@80 {
                                        reg = <0x80 0x18>, <0xa0 0x10>;
                                        compatible = "aspeed,ast2400-pinctrl";
index 9c91afb2b40420f828c5e1277d3444fe8694be3f..c6862182313af98d617c2d82a09f454496d28484 100644 (file)
                                        status = "disabled";
                                };
 
+                               silicon-id@7c {
+                                       compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
+                                       reg = <0x7c 0x4 0x150 0x8>;
+                               };
+
                                pinctrl: pinctrl@80 {
                                        compatible = "aspeed,ast2500-pinctrl";
                                        reg = <0x80 0x18>, <0xa0 0x10>;
index b58220a49cbd85cac6b149c035641ac2a1429c88..1ce3a1f06f7f53efef72b4136755f67759b1ef4e 100644 (file)
                                        compatible = "aspeed,ast2600-pinctrl";
                                };
 
+                               silicon-id@14 {
+                                       compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id";
+                                       reg = <0x14 0x4 0x5b0 0x8>;
+                               };
+
                                smp-memram@180 {
                                        compatible = "aspeed,ast2600-smpmem";
                                        reg = <0x180 0x40>;