dt-bindings: timer: renesas,cmt: Add r8a779a0 CMT support
authorWolfram Sang <wsa+renesas@sang-engineering.com>
Thu, 11 Mar 2021 09:09:18 +0000 (10:09 +0100)
committerDaniel Lezcano <daniel.lezcano@linaro.org>
Thu, 8 Apr 2021 11:23:23 +0000 (13:23 +0200)
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210311090918.2197-1-wsa+renesas@sang-engineering.com
Documentation/devicetree/bindings/timer/renesas,cmt.yaml

index 428db3a21bb9c38419a61e77c9e88710afe23a63..363ec28e07da3b4ba919105f2c898e928665801c 100644 (file)
@@ -79,6 +79,7 @@ properties:
               - renesas,r8a77980-cmt0     # 32-bit CMT0 on R-Car V3H
               - renesas,r8a77990-cmt0     # 32-bit CMT0 on R-Car E3
               - renesas,r8a77995-cmt0     # 32-bit CMT0 on R-Car D3
+              - renesas,r8a779a0-cmt0     # 32-bit CMT0 on R-Car V3U
           - const: renesas,rcar-gen3-cmt0 # 32-bit CMT0 on R-Car Gen3 and RZ/G2
 
       - items:
@@ -94,6 +95,7 @@ properties:
               - renesas,r8a77980-cmt1     # 48-bit CMT on R-Car V3H
               - renesas,r8a77990-cmt1     # 48-bit CMT on R-Car E3
               - renesas,r8a77995-cmt1     # 48-bit CMT on R-Car D3
+              - renesas,r8a779a0-cmt1     # 48-bit CMT on R-Car V3U
           - const: renesas,rcar-gen3-cmt1 # 48-bit CMT on R-Car Gen3 and RZ/G2
 
   reg: