ARM: 9274/1: Add hwcap for Speculative Store Bypassing Safe
authorAmit Daniel Kachhap <amit.kachhap@arm.com>
Thu, 17 Nov 2022 06:10:35 +0000 (07:10 +0100)
committerRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Mon, 28 Nov 2022 11:57:35 +0000 (11:57 +0000)
Speculative Store Bypassing Safe(FEAT_SSBS) is a feature present in
AArch32 state for Armv8 and is represented by ID_PFR2_EL1.SSBS
identification register.

This feature denotes the presence of PSTATE.ssbs bit and hence adding a
hwcap will enable the userspace to check it before trying to set/unset
this PSTATE.

This commit adds the ID feature bit detection, and uses elf_hwcap2
accordingly.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
arch/arm/include/uapi/asm/hwcap.h
arch/arm/kernel/setup.c

index bc9e7d318e25bb811eb9a743497584d37ef11f13..6b2023e39b6fbf0fbc2b143f7d9afe52e5482025 100644 (file)
@@ -44,5 +44,6 @@
 #define HWCAP2_SHA2    (1 << 3)
 #define HWCAP2_CRC32   (1 << 4)
 #define HWCAP2_SB      (1 << 5)
+#define HWCAP2_SSBS    (1 << 6)
 
 #endif /* _UAPI__ASMARM_HWCAP_H */
index 979612add87ac59720cc786c413ee3081cb51c82..4ec3ec32d830cb9765fd6d19f74829876403f1e5 100644 (file)
@@ -451,6 +451,7 @@ static void __init cpuid_init_hwcaps(void)
        int block;
        u32 isar5;
        u32 isar6;
+       u32 pfr2;
 
        if (cpu_architecture() < CPU_ARCH_ARMv7)
                return;
@@ -492,6 +493,12 @@ static void __init cpuid_init_hwcaps(void)
        block = cpuid_feature_extract_field(isar6, 12);
        if (block >= 1)
                elf_hwcap2 |= HWCAP2_SB;
+
+       /* Check for Speculative Store Bypassing control */
+       pfr2 = read_cpuid_ext(CPUID_EXT_PFR2);
+       block = cpuid_feature_extract_field(pfr2, 4);
+       if (block >= 1)
+               elf_hwcap2 |= HWCAP2_SSBS;
 }
 
 static void __init elf_hwcap_fixup(void)
@@ -1272,6 +1279,7 @@ static const char *hwcap2_str[] = {
        "sha2",
        "crc32",
        "sb",
+       "ssbs",
        NULL
 };