arm64: dts: renesas: rz-smarc: Use versa3 clk for audio mclk

Currently audio mclk uses a fixed clk of 11.2896MHz (multiple of 44.1kHz).
Replace this fixed clk with the programmable versa3 clk that can provide
the clocking to support both 44.1kHz (with a clock of 11.2896MHz) and
48kHz (with a clock of 12.2880MHz), based on audio sampling rate for
playback and record.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230825090518.87394-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi b/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
index a7594ba3a99865dfcec9f662261e72ae807a5680..b7a3e6caa3864edaea3d2608843dab5516699ee3 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
@@ -32,12 +32,6 @@
                stdout-path = "serial0:115200n8";
        };
 
-       audio_mclock: audio_mclock {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <11289600>;
-       };
-
        snd_rzg2l: sound {
                compatible = "simple-audio-card";
                simple-audio-card,format = "i2s";
@@ -55,7 +49,7 @@
                };
 
                codec_dai: simple-audio-card,codec {
-                       clocks = <&audio_mclock>;
+                       clocks = <&versa3 2>;
                        sound-dai = <&wm8978>;
                };
        };
@@ -76,6 +70,12 @@
                gpios-states = <1>;
                states = <3300000 1>, <1800000 0>;
        };
+
+       x1: x1-clock {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <24000000>;
+       };
 };
 
 &audio_clk1 {

diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
index 68eab8e26bf230217def0baf2d796fb0b6717708..37807f1bda4d37a52886af0c8dd023d74e2d8f44 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -110,6 +110,26 @@
                #sound-dai-cells = <0>;
                reg = <0x1a>;
        };
+
+       versa3: clock-generator@68 {
+               compatible = "renesas,5p35023";
+               reg = <0x68>;
+               #clock-cells = <1>;
+               clocks = <&x1>;
+
+               renesas,settings = [
+                       80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf
+                       00 14 7a e1 00 00 00 00 01 55 59 bb 3f 30 90 b6
+                       80 b0 45 c4 95
+               ];
+
+               assigned-clocks = <&versa3 0>, <&versa3 1>,
+                                 <&versa3 2>, <&versa3 3>,
+                                 <&versa3 4>, <&versa3 5>;
+               assigned-clock-rates = <24000000>, <11289600>,
+                                      <11289600>, <12000000>,
+                                      <25000000>, <12288000>;
+       };
 };
 
 #if PMOD_MTU3

diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
index 83fce96a25752e37167cd87674134d55c4808165..859bc8745e66a96441e3ce5e91ab6150e12edc92 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
@@ -126,6 +126,26 @@
                #sound-dai-cells = <0>;
                reg = <0x1a>;
        };
+
+       versa3: clock-generator@68 {
+               compatible = "renesas,5p35023";
+               reg = <0x68>;
+               #clock-cells = <1>;
+               clocks = <&x1>;
+
+               renesas,settings = [
+                       80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf
+                       00 14 7a e1 00 00 00 00 01 55 59 bb 3f 30 90 b6
+                       80 b0 45 c4 95
+               ];
+
+               assigned-clocks = <&versa3 0>, <&versa3 1>,
+                                 <&versa3 2>, <&versa3 3>,
+                                 <&versa3 4>, <&versa3 5>;
+               assigned-clock-rates = <24000000>, <11289600>,
+                                      <11289600>, <12000000>,
+                                      <25000000>, <12288000>;
+       };
 };
 
 #if PMOD_MTU3

diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
index 8eb411aac80d5d0e739ffb613392412ec6f97f57..de590996e10af2162cc2b71117814ac9dcd42dba 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
@@ -20,6 +20,30 @@
        sound-dai = <&ssi1>;
 };
 
+&i2c0 {
+       clock-frequency = <400000>;
+
+       versa3: clock-generator@68 {
+               compatible = "renesas,5p35023";
+               reg = <0x68>;
+               #clock-cells = <1>;
+               clocks = <&x1>;
+
+               renesas,settings = [
+                       80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf
+                       00 14 7a e1 00 00 00 00 01 55 59 bb 3f 30 90 b6
+                       80 b0 45 c4 95
+               ];
+
+               assigned-clocks = <&versa3 0>, <&versa3 1>,
+                                 <&versa3 2>, <&versa3 3>,
+                                 <&versa3 4>, <&versa3 5>;
+               assigned-clock-rates = <24000000>, <11289600>,
+                                      <11289600>, <12000000>,
+                                      <25000000>, <12288000>;
+       };
+};
+
 &i2c1 {
        wm8978: codec@1a {
                compatible = "wlf,wm8978";