iommu/arm-smmu: Reorganize arm_smmu_domain_add_master()

Make arm_smmu_domain_add_master() not use the smmu_domain to detect the
s2cr configuration, instead pass it in as a parameter. It always returns
zero so make it return void.

Since it no longer really does anything to do with a domain call it
arm_smmu_master_install_s2crs().

This is done to make the next two patches able to re-use this code without
forcing the creation of a struct arm_smmu_domain.

Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/1-v2-c86cc8c2230e+160bb-smmu_newapi_jgg@nvidia.com
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c
index d6d1a2a55cc0692fb02f0f58b901ac438c71604c..e2ec1fe14ed40bd1444d0ec56483954dcb47110c 100644 (file)
--- a/drivers/iommu/arm/arm-smmu/arm-smmu.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c
@@ -1081,21 +1081,14 @@ static void arm_smmu_master_free_smes(struct arm_smmu_master_cfg *cfg,
        mutex_unlock(&smmu->stream_map_mutex);
 }
 
-static int arm_smmu_domain_add_master(struct arm_smmu_domain *smmu_domain,
-                                     struct arm_smmu_master_cfg *cfg,
-                                     struct iommu_fwspec *fwspec)
+static void arm_smmu_master_install_s2crs(struct arm_smmu_master_cfg *cfg,
+                                         enum arm_smmu_s2cr_type type,
+                                         u8 cbndx, struct iommu_fwspec *fwspec)
 {
-       struct arm_smmu_device *smmu = smmu_domain->smmu;
+       struct arm_smmu_device *smmu = cfg->smmu;
        struct arm_smmu_s2cr *s2cr = smmu->s2crs;
-       u8 cbndx = smmu_domain->cfg.cbndx;
-       enum arm_smmu_s2cr_type type;
        int i, idx;
 
-       if (smmu_domain->stage == ARM_SMMU_DOMAIN_BYPASS)
-               type = S2CR_TYPE_BYPASS;
-       else
-               type = S2CR_TYPE_TRANS;
-
        for_each_cfg_sme(cfg, fwspec, i, idx) {
                if (type == s2cr[idx].type && cbndx == s2cr[idx].cbndx)
                        continue;
@@ -1105,7 +1098,6 @@ static int arm_smmu_domain_add_master(struct arm_smmu_domain *smmu_domain,
                s2cr[idx].cbndx = cbndx;
                arm_smmu_write_s2cr(smmu, idx);
        }
-       return 0;
 }
 
 static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
@@ -1153,7 +1145,12 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
        }
 
        /* Looks ok, so add the device to the domain */
-       ret = arm_smmu_domain_add_master(smmu_domain, cfg, fwspec);
+       arm_smmu_master_install_s2crs(cfg,
+                                     smmu_domain->stage ==
+                                                     ARM_SMMU_DOMAIN_BYPASS ?
+                                             S2CR_TYPE_BYPASS :
+                                             S2CR_TYPE_TRANS,
+                                     smmu_domain->cfg.cbndx, fwspec);
 
        /*
         * Setup an autosuspend delay to avoid bouncing runpm state.