hwrng: stm32 - rework power management sequences
authorGatien Chevallier <gatien.chevallier@foss.st.com>
Thu, 21 Sep 2023 08:03:00 +0000 (10:03 +0200)
committerHerbert Xu <herbert@gondor.apana.org.au>
Sun, 1 Oct 2023 08:28:15 +0000 (16:28 +0800)
Implement stm32_rng_suspend()/stm32_rng_resume() low-power APIs
called when the hardware block context will be lost.

There is no need to save the RNG_CR register in
stm32_rng_runtime_suspend() as the context is not lost. Therefore,
only enable/disable the RNG in the runtime sequences.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/char/hw_random/stm32-rng.c

index 4a602d666dadfe2696c43ff35e0131d5e68a2703..41e1dbea5d2ebb454801e51a0e172c74f94d4be5 100644 (file)
@@ -55,11 +55,25 @@ struct stm32_rng_data {
        bool    has_cond_reset;
 };
 
+/**
+ * struct stm32_rng_config - RNG configuration data
+ *
+ * @cr:                        RNG configuration. 0 means default hardware RNG configuration
+ * @nscr:              Noise sources control configuration.
+ * @htcr:              Health tests configuration.
+ */
+struct stm32_rng_config {
+       u32 cr;
+       u32 nscr;
+       u32 htcr;
+};
+
 struct stm32_rng_private {
        struct hwrng rng;
        void __iomem *base;
        struct clk *clk;
        struct reset_control *rst;
+       struct stm32_rng_config pm_conf;
        const struct stm32_rng_data *data;
        bool ced;
        bool lock_conf;
@@ -355,11 +369,10 @@ static int stm32_rng_remove(struct platform_device *ofdev)
        return 0;
 }
 
-#ifdef CONFIG_PM
-static int stm32_rng_runtime_suspend(struct device *dev)
+static int __maybe_unused stm32_rng_runtime_suspend(struct device *dev)
 {
-       u32 reg;
        struct stm32_rng_private *priv = dev_get_drvdata(dev);
+       u32 reg;
 
        reg = readl_relaxed(priv->base + RNG_CR);
        reg &= ~RNG_CR_RNGEN;
@@ -369,25 +382,98 @@ static int stm32_rng_runtime_suspend(struct device *dev)
        return 0;
 }
 
-static int stm32_rng_runtime_resume(struct device *dev)
+static int __maybe_unused stm32_rng_suspend(struct device *dev)
+{
+       struct stm32_rng_private *priv = dev_get_drvdata(dev);
+
+       if (priv->data->has_cond_reset) {
+               priv->pm_conf.nscr = readl_relaxed(priv->base + RNG_NSCR);
+               priv->pm_conf.htcr = readl_relaxed(priv->base + RNG_HTCR);
+       }
+
+       /* Do not save that RNG is enabled as it will be handled at resume */
+       priv->pm_conf.cr = readl_relaxed(priv->base + RNG_CR) & ~RNG_CR_RNGEN;
+
+       writel_relaxed(priv->pm_conf.cr, priv->base + RNG_CR);
+
+       clk_disable_unprepare(priv->clk);
+
+       return 0;
+}
+
+static int __maybe_unused stm32_rng_runtime_resume(struct device *dev)
 {
-       u32 reg;
        struct stm32_rng_private *priv = dev_get_drvdata(dev);
+       int err;
+       u32 reg;
+
+       err = clk_prepare_enable(priv->clk);
+       if (err)
+               return err;
+
+       /* Clean error indications */
+       writel_relaxed(0, priv->base + RNG_SR);
 
-       clk_prepare_enable(priv->clk);
        reg = readl_relaxed(priv->base + RNG_CR);
        reg |= RNG_CR_RNGEN;
        writel_relaxed(reg, priv->base + RNG_CR);
 
        return 0;
 }
-#endif
 
-static const struct dev_pm_ops stm32_rng_pm_ops = {
+static int __maybe_unused stm32_rng_resume(struct device *dev)
+{
+       struct stm32_rng_private *priv = dev_get_drvdata(dev);
+       int err;
+       u32 reg;
+
+       err = clk_prepare_enable(priv->clk);
+       if (err)
+               return err;
+
+       /* Clean error indications */
+       writel_relaxed(0, priv->base + RNG_SR);
+
+       if (priv->data->has_cond_reset) {
+               /*
+                * Correct configuration in bits [29:4] must be set in the same
+                * access that set RNG_CR_CONDRST bit. Else config setting is
+                * not taken into account. CONFIGLOCK bit must also be unset but
+                * it is not handled at the moment.
+                */
+               writel_relaxed(priv->pm_conf.cr | RNG_CR_CONDRST, priv->base + RNG_CR);
+
+               writel_relaxed(priv->pm_conf.nscr, priv->base + RNG_NSCR);
+               writel_relaxed(priv->pm_conf.htcr, priv->base + RNG_HTCR);
+
+               reg = readl_relaxed(priv->base + RNG_CR);
+               reg |= RNG_CR_RNGEN;
+               reg &= ~RNG_CR_CONDRST;
+               writel_relaxed(reg, priv->base + RNG_CR);
+
+               err = readl_relaxed_poll_timeout_atomic(priv->base + RNG_CR, reg,
+                                                       reg & ~RNG_CR_CONDRST, 10, 100000);
+
+               if (err) {
+                       clk_disable_unprepare(priv->clk);
+                       dev_err((struct device *)priv->rng.priv,
+                               "%s: timeout:%x CR: %x!\n", __func__, err, reg);
+                       return -EINVAL;
+               }
+       } else {
+               reg = priv->pm_conf.cr;
+               reg |= RNG_CR_RNGEN;
+               writel_relaxed(reg, priv->base + RNG_CR);
+       }
+
+       return 0;
+}
+
+static const struct dev_pm_ops __maybe_unused stm32_rng_pm_ops = {
        SET_RUNTIME_PM_OPS(stm32_rng_runtime_suspend,
                           stm32_rng_runtime_resume, NULL)
-       SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
-                               pm_runtime_force_resume)
+       SET_SYSTEM_SLEEP_PM_OPS(stm32_rng_suspend,
+                               stm32_rng_resume)
 };
 
 static const struct stm32_rng_data stm32mp13_rng_data = {
@@ -467,7 +553,7 @@ static int stm32_rng_probe(struct platform_device *ofdev)
 static struct platform_driver stm32_rng_driver = {
        .driver = {
                .name = "stm32-rng",
-               .pm = &stm32_rng_pm_ops,
+               .pm = pm_ptr(&stm32_rng_pm_ops),
                .of_match_table = stm32_rng_match,
        },
        .probe = stm32_rng_probe,