PCI: tegra: Fix CLKREQ dependency programming
authorVidya Sagar <vidyas@nvidia.com>
Sat, 5 Oct 2019 16:42:11 +0000 (22:12 +0530)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Fri, 18 Oct 2019 08:57:13 +0000 (09:57 +0100)
Corrects the programming to provide REFCLK to the downstream device
when there is no CLKREQ sideband signal routing present from root port
to the endpont.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
drivers/pci/controller/dwc/pcie-tegra194.c

index f89f5acee72d453112016e8d0e2a2e6654e9a018..cbe95f0ea0ca316938328ca2993c29bd525019a7 100644 (file)
@@ -40,8 +40,6 @@
 #define APPL_PINMUX_CLKREQ_OVERRIDE            BIT(3)
 #define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE_EN  BIT(4)
 #define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE     BIT(5)
-#define APPL_PINMUX_CLKREQ_OUT_OVRD_EN         BIT(9)
-#define APPL_PINMUX_CLKREQ_OUT_OVRD            BIT(10)
 
 #define APPL_CTRL                              0x4
 #define APPL_CTRL_SYS_PRE_DET_STATE            BIT(6)
@@ -1193,8 +1191,8 @@ static int tegra_pcie_config_controller(struct tegra_pcie_dw *pcie,
 
        if (!pcie->supports_clkreq) {
                val = appl_readl(pcie, APPL_PINMUX);
-               val |= APPL_PINMUX_CLKREQ_OUT_OVRD_EN;
-               val |= APPL_PINMUX_CLKREQ_OUT_OVRD;
+               val |= APPL_PINMUX_CLKREQ_OVERRIDE_EN;
+               val &= ~APPL_PINMUX_CLKREQ_OVERRIDE;
                appl_writel(pcie, val, APPL_PINMUX);
        }