media: ti-vpe: cal: catch error irqs and print errors

CAL reports various errors via IRQs, which are not handled at all by the
current driver. Add code to enable and catch those IRQs and print
errors. This will make it much easier to notice and debug issues with
sensors.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
[hverkuil-cisco@xs4all.nl: fix: spaces preferred around that '-']
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>

diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c
index 4f9dee3474ba6abb0ba99ea684a69cad4a60068e..838215a3f230fb021351864074c16ebc9d37124c 100644 (file)
--- a/drivers/media/platform/ti-vpe/cal.c
+++ b/drivers/media/platform/ti-vpe/cal.c
@@ -684,6 +684,21 @@ static void enable_irqs(struct cal_ctx *ctx)
 {
        u32 val;
 
+       const u32 cio_err_mask =
+               CAL_CSI2_COMPLEXIO_IRQ_LANE_ERRORS_MASK |
+               CAL_CSI2_COMPLEXIO_IRQ_FIFO_OVR_MASK |
+               CAL_CSI2_COMPLEXIO_IRQ_SHORT_PACKET_MASK |
+               CAL_CSI2_COMPLEXIO_IRQ_ECC_NO_CORRECTION_MASK;
+
+       /* Enable CIO error irqs */
+       reg_write(ctx->dev, CAL_HL_IRQENABLE_SET(1),
+                 CAL_HL_IRQ_CIO_MASK(ctx->csi2_port));
+       reg_write(ctx->dev, CAL_CSI2_COMPLEXIO_IRQENABLE(ctx->csi2_port),
+                 cio_err_mask);
+
+       /* Always enable OCPO error */
+       reg_write(ctx->dev, CAL_HL_IRQENABLE_SET(1), CAL_HL_IRQ_OCPO_ERR_MASK);
+
        /* Enable IRQ_WDMA_END 0/1 */
        val = 0;
        set_field(&val, CAL_HL_IRQ_ENABLE, CAL_HL_IRQ_MASK(ctx->csi2_port));
@@ -700,6 +715,12 @@ static void disable_irqs(struct cal_ctx *ctx)
 {
        u32 val;
 
+       /* Disable CIO error irqs */
+       reg_write(ctx->dev, CAL_HL_IRQENABLE_CLR(1),
+                 CAL_HL_IRQ_CIO_MASK(ctx->csi2_port));
+       reg_write(ctx->dev, CAL_CSI2_COMPLEXIO_IRQENABLE(ctx->csi2_port),
+                 0);
+
        /* Disable IRQ_WDMA_END 0/1 */
        val = 0;
        set_field(&val, CAL_HL_IRQ_CLEAR, CAL_HL_IRQ_MASK(ctx->csi2_port));
@@ -1171,7 +1192,30 @@ static irqreturn_t cal_irq(int irq_cal, void *data)
        struct cal_dev *dev = (struct cal_dev *)data;
        struct cal_ctx *ctx;
        struct cal_dmaqueue *dma_q;
-       u32 irqst2, irqst3;
+       u32 irqst1, irqst2, irqst3;
+
+       irqst1 = reg_read(dev, CAL_HL_IRQSTATUS(1));
+       if (irqst1) {
+               int i;
+
+               reg_write(dev, CAL_HL_IRQSTATUS(1), irqst1);
+
+               if (irqst1 & CAL_HL_IRQ_OCPO_ERR_MASK)
+                       dev_err_ratelimited(&dev->pdev->dev, "OCPO ERROR\n");
+
+               for (i = 1; i <= 2; ++i) {
+                       if (irqst1 & CAL_HL_IRQ_CIO_MASK(i)) {
+                               u32 cio_stat = reg_read(dev,
+                                                       CAL_CSI2_COMPLEXIO_IRQSTATUS(i));
+
+                               dev_err_ratelimited(&dev->pdev->dev,
+                                                   "CIO%d error: %#08x\n", i, cio_stat);
+
+                               reg_write(dev, CAL_CSI2_COMPLEXIO_IRQSTATUS(i),
+                                         cio_stat);
+                       }
+               }
+       }
 
        /* Check which DMA just finished */
        irqst2 = reg_read(dev, CAL_HL_IRQSTATUS(2));

diff --git a/drivers/media/platform/ti-vpe/cal_regs.h b/drivers/media/platform/ti-vpe/cal_regs.h
index 0b76d11860740a5f0a4d0c456b5c151a04a9ee0e..d9199141801be1c9b3164681cc6bb40df3ab7371 100644 (file)
--- a/drivers/media/platform/ti-vpe/cal_regs.h
+++ b/drivers/media/platform/ti-vpe/cal_regs.h
@@ -158,6 +158,11 @@
 #define CAL_HL_IRQ_ENABLED                             0x1
 #define CAL_HL_IRQ_PENDING                             0x1
 
+#define CAL_HL_IRQ_OCPO_ERR_MASK               BIT(6)
+
+#define CAL_HL_IRQ_CIO_MASK(i)                 BIT(16 + ((i) - 1) * 8)
+#define CAL_HL_IRQ_VC_MASK(i)                  BIT(17 + ((i) - 1) * 8)
+
 #define CAL_PIX_PROC_EN_MASK                   BIT(0)
 #define CAL_PIX_PROC_EXTRACT_MASK              GENMASK(4, 1)
 #define CAL_PIX_PROC_EXTRACT_B6                                0x0
@@ -414,6 +419,7 @@
 #define CAL_CSI2_COMPLEXIO_IRQ_ERRCONTROL3_MASK                BIT(17)
 #define CAL_CSI2_COMPLEXIO_IRQ_ERRCONTROL4_MASK                BIT(18)
 #define CAL_CSI2_COMPLEXIO_IRQ_ERRCONTROL5_MASK                BIT(19)
+#define CAL_CSI2_COMPLEXIO_IRQ_LANE_ERRORS_MASK                GENMASK(19, 0)
 #define CAL_CSI2_COMPLEXIO_IRQ_STATEULPM1_MASK         BIT(20)
 #define CAL_CSI2_COMPLEXIO_IRQ_STATEULPM2_MASK         BIT(21)
 #define CAL_CSI2_COMPLEXIO_IRQ_STATEULPM3_MASK         BIT(22)