wifi: rtw89: wow: update config mac function with different generation
authorChin-Yen Lee <timlee@realtek.com>
Sat, 2 Mar 2024 00:58:25 +0000 (08:58 +0800)
committerKalle Valo <kvalo@kernel.org>
Tue, 5 Mar 2024 18:56:43 +0000 (20:56 +0200)
The registers to configure mac function for WoWLAN mode that are different
from different generation, so update them.

Signed-off-by: Chin-Yen Lee <timlee@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240302005828.13666-5-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/fw.h
drivers/net/wireless/realtek/rtw89/mac.c
drivers/net/wireless/realtek/rtw89/mac.h
drivers/net/wireless/realtek/rtw89/mac_be.c
drivers/net/wireless/realtek/rtw89/reg.h
drivers/net/wireless/realtek/rtw89/wow.c

index 6993451a6ef95626ab957abc84003b922f3d07a5..44311f65b4fa565916b73f59086afa6197d58730 100644 (file)
@@ -64,6 +64,8 @@ struct rtw89_h2creg_sch_tx_en {
 #define RTW89_H2CREG_SCH_TX_EN_W1_MASK GENMASK(15, 0)
 #define RTW89_H2CREG_SCH_TX_EN_W1_BAND BIT(16)
 
+#define RTW89_H2CREG_WOW_CPUIO_RX_CTRL_EN GENMASK(23, 16)
+
 #define RTW89_H2CREG_MAX 4
 #define RTW89_C2HREG_MAX 4
 #define RTW89_C2HREG_HDR_LEN 2
@@ -95,7 +97,9 @@ enum rtw89_mac_h2c_type {
        RTW89_FWCMD_H2CREG_FUNC_FWERR,
        RTW89_FWCMD_H2CREG_FUNC_GET_FEATURE,
        RTW89_FWCMD_H2CREG_FUNC_GETPKT_INFORM,
-       RTW89_FWCMD_H2CREG_FUNC_SCH_TX_EN
+       RTW89_FWCMD_H2CREG_FUNC_SCH_TX_EN,
+       RTW89_FWCMD_H2CREG_FUNC_WOW_TRX_STOP = 0x6,
+       RTW89_FWCMD_H2CREG_FUNC_WOW_CPUIO_RX_CTRL = 0xA,
 };
 
 enum rtw89_mac_c2h_type {
@@ -104,7 +108,8 @@ enum rtw89_mac_c2h_type {
        RTW89_FWCMD_C2HREG_FUNC_ERR_MSG,
        RTW89_FWCMD_C2HREG_FUNC_PHY_CAP,
        RTW89_FWCMD_C2HREG_FUNC_TX_PAUSE_RPT,
-       RTW89_FWCMD_C2HREG_FUNC_NULL = 0xFF
+       RTW89_FWCMD_C2HREG_FUNC_WOW_CPUIO_RX_ACK = 0xA,
+       RTW89_FWCMD_C2HREG_FUNC_NULL = 0xFF,
 };
 
 enum rtw89_fw_c2h_category {
index 67adb005f1215375544d879ea7909206a63b70b7..06a4b7ab020016654d4ac3e0c36f725d22c2f965 100644 (file)
@@ -6266,6 +6266,41 @@ int rtw89_mac_ptk_drop_by_band_and_wait(struct rtw89_dev *rtwdev,
        return ret;
 }
 
+static int rtw89_wow_config_mac_ax(struct rtw89_dev *rtwdev, bool enable_wow)
+{
+       const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
+       int ret;
+
+       if (enable_wow) {
+               ret = rtw89_mac_resize_ple_rx_quota(rtwdev, true);
+               if (ret) {
+                       rtw89_err(rtwdev, "[ERR]patch rx qta %d\n", ret);
+                       return ret;
+               }
+
+               rtw89_write32_set(rtwdev, R_AX_RX_FUNCTION_STOP, B_AX_HDR_RX_STOP);
+               rtw89_write32_clr(rtwdev, mac->rx_fltr, B_AX_SNIFFER_MODE);
+               rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false);
+               rtw89_write32(rtwdev, R_AX_ACTION_FWD0, 0);
+               rtw89_write32(rtwdev, R_AX_ACTION_FWD1, 0);
+               rtw89_write32(rtwdev, R_AX_TF_FWD, 0);
+               rtw89_write32(rtwdev, R_AX_HW_RPT_FWD, 0);
+       } else {
+               ret = rtw89_mac_resize_ple_rx_quota(rtwdev, false);
+               if (ret) {
+                       rtw89_err(rtwdev, "[ERR]patch rx qta %d\n", ret);
+                       return ret;
+               }
+
+               rtw89_write32_clr(rtwdev, R_AX_RX_FUNCTION_STOP, B_AX_HDR_RX_STOP);
+               rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true);
+               rtw89_write32(rtwdev, R_AX_ACTION_FWD0, TRXCFG_MPDU_PROC_ACT_FRWD);
+               rtw89_write32(rtwdev, R_AX_TF_FWD, TRXCFG_MPDU_PROC_TF_FRWD);
+       }
+
+       return 0;
+}
+
 static u8 rtw89_fw_get_rdy_ax(struct rtw89_dev *rtwdev, enum rtw89_fwdl_check_type type)
 {
        u8 val = rtw89_read8(rtwdev, R_AX_WCPU_FW_CTRL);
@@ -6357,5 +6392,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_ax = {
 
        .add_chan_list = rtw89_hw_scan_add_chan_list,
        .scan_offload = rtw89_fw_h2c_scan_offload,
+
+       .wow_config_mac = rtw89_wow_config_mac_ax,
 };
 EXPORT_SYMBOL(rtw89_mac_gen_ax);
index 3e9a65125054f81f72c12c8384bd1c3eea2e5628..6fb457153a11c68999f8c16f01331958422a4d21 100644 (file)
@@ -169,6 +169,12 @@ enum rtw89_mac_ax_l0_to_l1_event {
        MAC_AX_L0_TO_L1_EVENT_MAX = 15,
 };
 
+enum rtw89_mac_wow_fw_status {
+       WOWLAN_NOT_READY = 0x00,
+       WOWLAN_SLEEP_READY = 0x01,
+       WOWLAN_RESUME_READY = 0x02,
+};
+
 #define RTW89_PORT_OFFSET_TU_TO_32US(shift_tu) ((shift_tu) * 1024 / 32)
 
 enum rtw89_mac_dbg_port_sel {
@@ -980,6 +986,8 @@ struct rtw89_mac_gen_def {
        int (*scan_offload)(struct rtw89_dev *rtwdev,
                            struct rtw89_scan_option *option,
                            struct rtw89_vif *rtwvif);
+
+       int (*wow_config_mac)(struct rtw89_dev *rtwdev, bool enable_wow);
 };
 
 extern const struct rtw89_mac_gen_def rtw89_mac_gen_ax;
index 1d03197529ce19230f20b4c1d93a85f643fabfd4..f16467377eabafd379592b3ff008a834a3983046 100644 (file)
@@ -2307,6 +2307,52 @@ static void rtw89_mac_dump_qta_lost_be(struct rtw89_dev *rtwdev)
        dump_err_status_dispatcher_be(rtwdev);
 }
 
+static int rtw89_mac_cpu_io_rx(struct rtw89_dev *rtwdev, bool wow_enable)
+{
+       struct rtw89_mac_h2c_info h2c_info = {};
+       struct rtw89_mac_c2h_info c2h_info = {};
+       u32 ret;
+
+       h2c_info.id = RTW89_FWCMD_H2CREG_FUNC_WOW_CPUIO_RX_CTRL;
+       h2c_info.content_len = sizeof(h2c_info.u.hdr);
+       h2c_info.u.hdr.w0 = u32_encode_bits(wow_enable, RTW89_H2CREG_WOW_CPUIO_RX_CTRL_EN);
+
+       ret = rtw89_fw_msg_reg(rtwdev, &h2c_info, &c2h_info);
+       if (ret)
+               return ret;
+
+       if (c2h_info.id != RTW89_FWCMD_C2HREG_FUNC_WOW_CPUIO_RX_ACK)
+               ret = -EINVAL;
+
+       return ret;
+}
+
+static int rtw89_wow_config_mac_be(struct rtw89_dev *rtwdev, bool enable_wow)
+{
+       if (enable_wow) {
+               rtw89_write32_set(rtwdev, R_BE_RX_STOP, B_BE_HOST_RX_STOP);
+               rtw89_write32_clr(rtwdev, R_BE_RX_FLTR_OPT, B_BE_SNIFFER_MODE);
+               rtw89_mac_cpu_io_rx(rtwdev, enable_wow);
+               rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false);
+               rtw89_write32(rtwdev, R_BE_FWD_ERR, 0);
+               rtw89_write32(rtwdev, R_BE_FWD_ACTN0, 0);
+               rtw89_write32(rtwdev, R_BE_FWD_ACTN1, 0);
+               rtw89_write32(rtwdev, R_BE_FWD_ACTN2, 0);
+               rtw89_write32(rtwdev, R_BE_FWD_TF0, 0);
+               rtw89_write32(rtwdev, R_BE_FWD_TF1, 0);
+               rtw89_write32(rtwdev, R_BE_FWD_ERR, 0);
+               rtw89_write32(rtwdev, R_BE_HW_PPDU_STATUS, 0);
+               rtw89_write8(rtwdev, R_BE_DBG_WOW_READY, WOWLAN_NOT_READY);
+       } else {
+               rtw89_mac_cpu_io_rx(rtwdev, enable_wow);
+               rtw89_write32_clr(rtwdev, R_BE_RX_STOP, B_BE_HOST_RX_STOP);
+               rtw89_write32_set(rtwdev, R_BE_RX_FLTR_OPT, R_BE_RX_FLTR_OPT);
+               rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true);
+       }
+
+       return 0;
+}
+
 static void rtw89_mac_dump_cmac_err_status_be(struct rtw89_dev *rtwdev,
                                              u8 band)
 {
@@ -2569,5 +2615,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_be = {
 
        .add_chan_list = rtw89_hw_scan_add_chan_list_be,
        .scan_offload = rtw89_fw_h2c_scan_offload_be,
+
+       .wow_config_mac = rtw89_wow_config_mac_be,
 };
 EXPORT_SYMBOL(rtw89_mac_gen_be);
index 3a8117b666bf18a17ae6d6595167e0889061c374..088d39202ca248f2be83ac3b8323cfbcfa087585 100644 (file)
 #define B_BE_HCI_RXDMA_EN BIT(1)
 #define B_BE_HCI_TXDMA_EN BIT(0)
 
+#define R_BE_DBG_WOW_READY 0x815E
+#define B_BE_DBG_WOW_READY GENMASK(7, 0)
+
 #define R_BE_DMAC_FUNC_EN 0x8400
 #define B_BE_DMAC_CRPRT BIT(31)
 #define B_BE_MAC_FUNC_EN BIT(30)
                               B_BE_CR_WRFF_OVERFLOW_ERR_INT_EN | \
                               B_BE_CR_WRFF_UNDERFLOW_ERR_INT_EN)
 
+#define R_BE_RX_STOP 0x8914
+#define B_BE_CPU_RX_STOP BIT(17)
+#define B_BE_HOST_RX_STOP BIT(16)
+#define B_BE_CPU_RX_CH_STOP_MSK GENMASK(15, 8)
+#define B_BE_HOST_RX_CH_STOP_MSK GENMASK(5, 0)
+
 #define R_BE_DISP_FWD_WLAN_0 0x8938
 #define B_BE_FWD_WLAN_CPU_TYPE_13_MASK GENMASK(31, 30)
 #define B_BE_FWD_WLAN_CPU_TYPE_12_MASK GENMASK(29, 28)
 #define B_BE_DROP_NONDMA_PPDU BIT(2)
 #define B_BE_APPEND_FCS BIT(0)
 
+#define R_BE_FWD_ERR 0x9C10
+#define R_BE_FWD_ACTN0 0x9C14
+#define R_BE_FWD_ACTN1 0x9C18
+#define R_BE_FWD_ACTN2 0x9C1C
+#define R_BE_FWD_TF0 0x9C20
+#define R_BE_FWD_TF1 0x9C24
+
 #define R_BE_HW_PPDU_STATUS 0x9C30
 #define B_BE_FWD_RPKTTYPE_MASK GENMASK(31, 26)
 #define B_BE_FWD_PPDU_PRTID_MASK GENMASK(25, 23)
index 286c59931fca44e9ed23cc687e448666236ca9e6..689a4e94387ab08e7def123c34f8c4008f25f12b 100644 (file)
@@ -41,34 +41,8 @@ static void rtw89_wow_leave_lps(struct rtw89_dev *rtwdev)
 static int rtw89_wow_config_mac(struct rtw89_dev *rtwdev, bool enable_wow)
 {
        const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
-       int ret;
 
-       if (enable_wow) {
-               ret = rtw89_mac_resize_ple_rx_quota(rtwdev, true);
-               if (ret) {
-                       rtw89_err(rtwdev, "[ERR]patch rx qta %d\n", ret);
-                       return ret;
-               }
-               rtw89_write32_set(rtwdev, R_AX_RX_FUNCTION_STOP, B_AX_HDR_RX_STOP);
-               rtw89_write32_clr(rtwdev, mac->rx_fltr, B_AX_SNIFFER_MODE);
-               rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false);
-               rtw89_write32(rtwdev, R_AX_ACTION_FWD0, 0);
-               rtw89_write32(rtwdev, R_AX_ACTION_FWD1, 0);
-               rtw89_write32(rtwdev, R_AX_TF_FWD, 0);
-               rtw89_write32(rtwdev, R_AX_HW_RPT_FWD, 0);
-       } else {
-               ret = rtw89_mac_resize_ple_rx_quota(rtwdev, false);
-               if (ret) {
-                       rtw89_err(rtwdev, "[ERR]patch rx qta %d\n", ret);
-                       return ret;
-               }
-               rtw89_write32_clr(rtwdev, R_AX_RX_FUNCTION_STOP, B_AX_HDR_RX_STOP);
-               rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true);
-               rtw89_write32(rtwdev, R_AX_ACTION_FWD0, TRXCFG_MPDU_PROC_ACT_FRWD);
-               rtw89_write32(rtwdev, R_AX_TF_FWD, TRXCFG_MPDU_PROC_TF_FRWD);
-       }
-
-       return 0;
+       return mac->wow_config_mac(rtwdev, enable_wow);
 }
 
 static void rtw89_wow_set_rx_filter(struct rtw89_dev *rtwdev, bool enable)