From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Date: Tue, 9 Jun 2020 13:30:29 +0000 (+0530)
Subject: arm64: dts: qcom: sc7180: Add iommus property to ETR
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=015156e689aa1f0c836f9ef4d342b6f6897afd74;p=linux.git

arm64: dts: qcom: sc7180: Add iommus property to ETR

Define iommus property for Coresight ETR component in
SC7180 SoC with the SID and mask to enable SMMU
translation for this master.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/2312c9a10e7251d69e31e4f51c0f1d70e6f2f2f5.1591708204.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 7097907a8379e..9ad6752c57f7d 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -2127,6 +2127,7 @@
 		etr@6048000 {
 			compatible = "arm,coresight-tmc", "arm,primecell";
 			reg = <0 0x06048000 0 0x1000>;
+			iommus = <&apps_smmu 0x04a0 0x20>;
 
 			clocks = <&aoss_qmp>;
 			clock-names = "apb_pclk";