From: Dylan Jhong <dylan@andestech.com>
Date: Mon, 29 Mar 2021 03:48:01 +0000 (+0800)
Subject: target/riscv: Align the data type of reset vector address
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=01e723bf187974bd2b61cc6e936fa41d44fa16d2;p=qemu.git

target/riscv: Align the data type of reset vector address

Use target_ulong to instead of uint64_t on reset vector address
to adapt on both 32/64 machine.

Signed-off-by: Dylan Jhong <dylan@andestech.com>
Signed-off-by: Ruinland ChuanTzu Tsai <ruinland@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210329034801.22667-1-dylan@andestech.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 86e7dbeb20..047d6344fe 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -137,7 +137,7 @@ static void set_feature(CPURISCVState *env, int feature)
     env->features |= (1ULL << feature);
 }
 
-static void set_resetvec(CPURISCVState *env, int resetvec)
+static void set_resetvec(CPURISCVState *env, target_ulong resetvec)
 {
 #ifndef CONFIG_USER_ONLY
     env->resetvec = resetvec;