From: Markos Chandras <markos.chandras@imgtec.com>
Date: Thu, 9 Jul 2015 09:40:45 +0000 (+0100)
Subject: MIPS: CM: The CMGCRBase register is 64-bit on 64 bit kernels.
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=038b0f536e45d85038428d2edc169f1f4089c36d;p=linux.git

MIPS: CM: The CMGCRBase register is 64-bit on 64 bit kernels.

The CMGCRBase register (CP0, 15, 3) register is 64-bit on MIPS64
so we change its type to unsigned long.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10644/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/arch/mips/kernel/mips-cm.c b/arch/mips/kernel/mips-cm.c
index 3d2cb6f478981..c390be1cecc92 100644
--- a/arch/mips/kernel/mips-cm.c
+++ b/arch/mips/kernel/mips-cm.c
@@ -20,7 +20,7 @@ int mips_cm_is64;
 phys_addr_t __mips_cm_phys_base(void)
 {
 	u32 config3 = read_c0_config3();
-	u32 cmgcr;
+	unsigned long cmgcr;
 
 	/* Check the CMGCRBase register is implemented */
 	if (!(config3 & MIPS_CONF3_CMGCR))