From: Shengjiu Wang Date: Tue, 7 Jul 2020 08:54:25 +0000 (+0800) Subject: ASoC: fsl_spdif: Clear the validity bit for TX X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=055b082156704b85a059770359d6cdedfb24831d;p=linux.git ASoC: fsl_spdif: Clear the validity bit for TX In IEC958 spec, "The validity bit is logical "0" if the information in the main data field is reliable, and it is logical "1" if it is not". The default value of "ValCtrl" is zero, which means "Outgoing Validity always set", then all the data is not reliable, then some spdif sink device will drop the data. So set "ValCtrl" to 1, that is to clear "Outgoing Validity" in default. Signed-off-by: Shengjiu Wang Link: https://lore.kernel.org/r/1594112066-31297-2-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown --- diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c index 9fb95c6ee7baa..576370dc6e707 100644 --- a/sound/soc/fsl/fsl_spdif.c +++ b/sound/soc/fsl/fsl_spdif.c @@ -985,6 +985,10 @@ static int fsl_spdif_dai_probe(struct snd_soc_dai *dai) snd_soc_add_dai_controls(dai, fsl_spdif_ctrls, ARRAY_SIZE(fsl_spdif_ctrls)); + /*Clear the val bit for Tx*/ + regmap_update_bits(spdif_private->regmap, REG_SPDIF_SCR, + SCR_VAL_MASK, SCR_VAL_CLEAR); + return 0; }