From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Wed, 14 Jul 2021 09:42:13 +0000 (+0200)
Subject: dt-bindings: phy: Rename Intel Keem Bay USB PHY bindings
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=057d445b9ef22c0c17fad46beb82146c9f0574c0;p=linux.git

dt-bindings: phy: Rename Intel Keem Bay USB PHY bindings

This is the only file not using the "intel,keembay-*" pattern.
Fortunately the actual compatible value is already following the
standard scheme.

Fixes: 4086afa2a1627939 ("dt-bindings: phy: Add Intel Keem Bay USB PHY bindings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/91235a64185f7446fc58e638d77691078d3114d1.1626255556.git.geert+renesas@glider.be
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---

diff --git a/Documentation/devicetree/bindings/phy/intel,keembay-phy-usb.yaml b/Documentation/devicetree/bindings/phy/intel,keembay-phy-usb.yaml
new file mode 100644
index 0000000000000..52815b6c2b88d
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/intel,keembay-phy-usb.yaml
@@ -0,0 +1,44 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/intel,keembay-phy-usb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel Keem Bay USB PHY bindings
+
+maintainers:
+  - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
+
+properties:
+  compatible:
+    const: intel,keembay-usb-phy
+
+  reg:
+    items:
+      - description: USB APB CPR (clock, power, reset) register
+      - description: USB APB slave register
+
+  reg-names:
+    items:
+      - const: cpr-apb-base
+      - const: slv-apb-base
+
+  '#phy-cells':
+    const: 0
+
+required:
+  - compatible
+  - reg
+  - '#phy-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    usb-phy@20400000 {
+          compatible = "intel,keembay-usb-phy";
+          reg = <0x20400000 0x1c>,
+                <0x20480000 0xd0>;
+          reg-names = "cpr-apb-base", "slv-apb-base";
+          #phy-cells = <0>;
+    };
diff --git a/Documentation/devicetree/bindings/phy/intel,phy-keembay-usb.yaml b/Documentation/devicetree/bindings/phy/intel,phy-keembay-usb.yaml
deleted file mode 100644
index a217bb8ac5bc0..0000000000000
--- a/Documentation/devicetree/bindings/phy/intel,phy-keembay-usb.yaml
+++ /dev/null
@@ -1,44 +0,0 @@
-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/phy/intel,phy-keembay-usb.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Intel Keem Bay USB PHY bindings
-
-maintainers:
-  - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
-
-properties:
-  compatible:
-    const: intel,keembay-usb-phy
-
-  reg:
-    items:
-      - description: USB APB CPR (clock, power, reset) register
-      - description: USB APB slave register
-
-  reg-names:
-    items:
-      - const: cpr-apb-base
-      - const: slv-apb-base
-
-  '#phy-cells':
-    const: 0
-
-required:
-  - compatible
-  - reg
-  - '#phy-cells'
-
-additionalProperties: false
-
-examples:
-  - |
-    usb-phy@20400000 {
-          compatible = "intel,keembay-usb-phy";
-          reg = <0x20400000 0x1c>,
-                <0x20480000 0xd0>;
-          reg-names = "cpr-apb-base", "slv-apb-base";
-          #phy-cells = <0>;
-    };