From: Ingo Molnar <mingo@kernel.org>
Date: Sat, 16 Oct 2021 13:17:46 +0000 (+0200)
Subject: Merge branch 'x86/urgent' into x86/fpu, to resolve a conflict
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=082f20b21de20285da2cbfc1be29656f0714c1b8;p=linux.git

Merge branch 'x86/urgent' into x86/fpu, to resolve a conflict

Resolve the conflict between these commits:

   x86/fpu:      1193f408cd51 ("x86/fpu/signal: Change return type of __fpu_restore_sig() to boolean")

   x86/urgent:   d298b03506d3 ("x86/fpu: Restore the masking out of reserved MXCSR bits")
                 b2381acd3fd9 ("x86/fpu: Mask out the invalid MXCSR bits properly")

 Conflicts:
        arch/x86/kernel/fpu/signal.c

Signed-off-by: Ingo Molnar <mingo@kernel.org>
---

082f20b21de20285da2cbfc1be29656f0714c1b8
diff --cc arch/x86/kernel/fpu/signal.c
index 39c7bae97daf1,831b25c5e7058..51c4915a35f0a
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@@ -382,11 -377,16 +382,16 @@@ static bool __fpu_restore_sig(void __us
  	} else {
  		if (__copy_from_user(&fpu->state.fxsave, buf_fx,
  				     sizeof(fpu->state.fxsave)))
 -			return -EFAULT;
 +			return false;
  
- 		/* Reject invalid MXCSR values. */
- 		if (fpu->state.fxsave.mxcsr & ~mxcsr_feature_mask)
- 			return false;
+ 		if (IS_ENABLED(CONFIG_X86_64)) {
+ 			/* Reject invalid MXCSR values. */
+ 			if (fpu->state.fxsave.mxcsr & ~mxcsr_feature_mask)
 -				return -EINVAL;
++				return false;
+ 		} else {
+ 			/* Mask invalid bits out for historical reasons (broken hardware). */
+ 			fpu->state.fxsave.mxcsr &= mxcsr_feature_mask;
+ 		}
  
  		/* Enforce XFEATURE_MASK_FPSSE when XSAVE is enabled */
  		if (use_xsave())