From: Hervé Poussineau Date: Sat, 14 Sep 2013 15:51:07 +0000 (+0200) Subject: lsi: ignore write accesses to CTEST0 registers X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=0903c35ddeebde56772b39cf08e7a0bae2eb39eb;p=qemu.git lsi: ignore write accesses to CTEST0 registers 53C895A datasheet says that this register is read/write, and that the value returned on read access is dependant of DMA FIFO state. However, nothing is said for written value. 53C810A datasheet gives more insight about this register: "This was a general purpose read/write register in previous SYM53C8XX family chips. Although it is still a read/write register, Symbios reserves the right to use these bits for future 53C8XX family enhancements." This prevents going to the default case, which prints an error message. Signed-off-by: Hervé Poussineau Signed-off-by: Paolo Bonzini --- diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c index 4314efe9f0..89d934b4be 100644 --- a/hw/scsi/lsi53c895a.c +++ b/hw/scsi/lsi53c895a.c @@ -1743,6 +1743,9 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val) case 0x17: /* MBOX1 */ s->mbox1 = val; break; + case 0x18: /* CTEST0 */ + /* nothing to do */ + break; case 0x1a: /* CTEST2 */ s->ctest2 = val & LSI_CTEST2_PCICIE; break;