From: Manivannan Sadhasivam Date: Thu, 16 Mar 2023 08:11:13 +0000 (+0530) Subject: dt-bindings: PCI: qcom: Add "mhi" register region to supported SoCs X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=0f80edf8447d23e9eb07fcdbdec19b431ea7ad89;p=linux.git dt-bindings: PCI: qcom: Add "mhi" register region to supported SoCs "mhi" register region contains the MHI registers that could be used by the PCIe controller drivers to get debug information like PCIe link transition counts on newer SoCs. Link: https://lore.kernel.org/r/20230316081117.14288-16-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam Signed-off-by: Lorenzo Pieralisi Reviewed-by: Krzysztof Kozlowski --- diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index fb32c43dd12de..ecbb0f9efa212 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -44,11 +44,11 @@ properties: reg: minItems: 4 - maxItems: 5 + maxItems: 6 reg-names: minItems: 4 - maxItems: 5 + maxItems: 6 interrupts: minItems: 1 @@ -185,13 +185,15 @@ allOf: properties: reg: minItems: 4 - maxItems: 4 + maxItems: 5 reg-names: + minItems: 4 items: - const: parf # Qualcomm specific registers - const: dbi # DesignWare PCIe registers - const: elbi # External local bus interface registers - const: config # PCIe configuration space + - const: mhi # MHI registers - if: properties: @@ -209,14 +211,16 @@ allOf: properties: reg: minItems: 5 - maxItems: 5 + maxItems: 6 reg-names: + minItems: 5 items: - const: parf # Qualcomm specific registers - const: dbi # DesignWare PCIe registers - const: elbi # External local bus interface registers - const: atu # ATU address space - const: config # PCIe configuration space + - const: mhi # MHI registers - if: properties: