From: Robert Richter <robert.richter@amd.com>
Date: Fri, 12 Jun 2009 15:58:48 +0000 (+0200)
Subject: Merge commit 'tip/perfcounters-for-linus' into oprofile/master
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=1241eb8f136bf3ea409f61590e7663465906d158;p=linux.git

Merge commit 'tip/perfcounters-for-linus' into oprofile/master

Conflicts:
	arch/x86/oprofile/op_model_ppro.c

Signed-off-by: Robert Richter <robert.richter@amd.com>
---

1241eb8f136bf3ea409f61590e7663465906d158
diff --cc arch/x86/oprofile/op_model_ppro.c
index 0a261a5c696e5,4da7230b3d171..cd72d5c73b490
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@@ -122,12 -147,13 +129,13 @@@ static int ppro_check_ctrs(struct pt_re
  		if (!reset_value[i])
  			continue;
  		rdmsrl(msrs->counters[i].addr, val);
 -		if (CTR_OVERFLOWED(val)) {
 -			oprofile_add_sample(regs, i);
 -			wrmsrl(msrs->counters[i].addr, -reset_value[i]);
 -		}
 +		if (val & (1ULL << (counter_width - 1)))
 +			continue;
 +		oprofile_add_sample(regs, i);
 +		wrmsrl(msrs->counters[i].addr, -reset_value[i]);
  	}
  
+ out:
  	/* Only P6 based Pentium M need to re-unmask the apic vector but it
  	 * doesn't hurt other P6 variant */
  	apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
diff --cc arch/x86/oprofile/op_x86_model.h
index fda52b4c1b95b,825e79064d64e..505489873b9d3
--- a/arch/x86/oprofile/op_x86_model.h
+++ b/arch/x86/oprofile/op_x86_model.h
@@@ -12,12 -11,14 +12,12 @@@
  #ifndef OP_X86_MODEL_H
  #define OP_X86_MODEL_H
  
 -struct op_saved_msr {
 -	unsigned int high;
 -	unsigned int low;
 -};
 +#include <asm/types.h>
- #include <asm/intel_arch_perfmon.h>
++#include <asm/perf_counter.h>
  
  struct op_msr {
 -	unsigned long addr;
 -	struct op_saved_msr saved;
 +	unsigned long	addr;
 +	u64		saved;
  };
  
  struct op_msrs {