From: Bjorn Andersson <andersson@kernel.org>
Date: Tue, 28 Mar 2023 22:32:04 +0000 (-0700)
Subject: Merge branch 'arm64-fixes-for-6.3' into arm64-for-6.4
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=1554413537fdbc6fcb284f5419203d4945a4781d;p=linux.git

Merge branch 'arm64-fixes-for-6.3' into arm64-for-6.4

Merge the arm64-fixes-for-6.3 branch to avoid merge conflicts with
changes for v6.4.
---

1554413537fdbc6fcb284f5419203d4945a4781d
diff --cc arch/arm64/boot/dts/qcom/sm8550.dtsi
index 9c135417cd548,5d0888398b3c3..ed2554be467fd
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@@ -66,9 -66,8 +66,9 @@@
  
  		CPU0: cpu@0 {
  			device_type = "cpu";
- 			compatible = "qcom,kryo";
+ 			compatible = "arm,cortex-a510";
  			reg = <0 0>;
 +			clocks = <&cpufreq_hw 0>;
  			enable-method = "psci";
  			next-level-cache = <&L2_0>;
  			power-domains = <&CPU_PD0>;
@@@ -90,9 -89,8 +90,9 @@@
  
  		CPU1: cpu@100 {
  			device_type = "cpu";
- 			compatible = "qcom,kryo";
+ 			compatible = "arm,cortex-a510";
  			reg = <0 0x100>;
 +			clocks = <&cpufreq_hw 0>;
  			enable-method = "psci";
  			next-level-cache = <&L2_100>;
  			power-domains = <&CPU_PD1>;
@@@ -110,9 -108,8 +110,9 @@@
  
  		CPU2: cpu@200 {
  			device_type = "cpu";
- 			compatible = "qcom,kryo";
+ 			compatible = "arm,cortex-a510";
  			reg = <0 0x200>;
 +			clocks = <&cpufreq_hw 0>;
  			enable-method = "psci";
  			next-level-cache = <&L2_200>;
  			power-domains = <&CPU_PD2>;
@@@ -130,9 -127,8 +130,9 @@@
  
  		CPU3: cpu@300 {
  			device_type = "cpu";
- 			compatible = "qcom,kryo";
+ 			compatible = "arm,cortex-a715";
  			reg = <0 0x300>;
 +			clocks = <&cpufreq_hw 1>;
  			enable-method = "psci";
  			next-level-cache = <&L2_300>;
  			power-domains = <&CPU_PD3>;
@@@ -150,9 -146,8 +150,9 @@@
  
  		CPU4: cpu@400 {
  			device_type = "cpu";
- 			compatible = "qcom,kryo";
+ 			compatible = "arm,cortex-a715";
  			reg = <0 0x400>;
 +			clocks = <&cpufreq_hw 1>;
  			enable-method = "psci";
  			next-level-cache = <&L2_400>;
  			power-domains = <&CPU_PD4>;
@@@ -170,9 -165,8 +170,9 @@@
  
  		CPU5: cpu@500 {
  			device_type = "cpu";
- 			compatible = "qcom,kryo";
+ 			compatible = "arm,cortex-a710";
  			reg = <0 0x500>;
 +			clocks = <&cpufreq_hw 1>;
  			enable-method = "psci";
  			next-level-cache = <&L2_500>;
  			power-domains = <&CPU_PD5>;
@@@ -190,9 -184,8 +190,9 @@@
  
  		CPU6: cpu@600 {
  			device_type = "cpu";
- 			compatible = "qcom,kryo";
+ 			compatible = "arm,cortex-a710";
  			reg = <0 0x600>;
 +			clocks = <&cpufreq_hw 1>;
  			enable-method = "psci";
  			next-level-cache = <&L2_600>;
  			power-domains = <&CPU_PD6>;
@@@ -210,9 -203,8 +210,9 @@@
  
  		CPU7: cpu@700 {
  			device_type = "cpu";
- 			compatible = "qcom,kryo";
+ 			compatible = "arm,cortex-x3";
  			reg = <0 0x700>;
 +			clocks = <&cpufreq_hw 2>;
  			enable-method = "psci";
  			next-level-cache = <&L2_700>;
  			power-domains = <&CPU_PD7>;