From: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Date: Tue, 12 May 2020 14:54:52 +0000 (+0530)
Subject: net: cadence_gem: Update the reset value for interrupt mask register
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=15baf5e23743871820504be6afb1bae24d1211c2;p=qemu.git

net: cadence_gem: Update the reset value for interrupt mask register

Mask all interrupt on reset.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
---

diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index 2211550d2b..df6d8186ca 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -1375,6 +1375,7 @@ static void gem_reset(DeviceState *d)
     s->regs[GEM_DESCONF2] = 0x2ab10000 | s->jumbo_max_len;
     s->regs[GEM_DESCONF5] = 0x002f2045;
     s->regs[GEM_DESCONF6] = GEM_DESCONF6_64B_MASK;
+    s->regs[GEM_INT_Q1_MASK] = 0x00000CE6;
     s->regs[GEM_JUMBO_MAX_LEN] = s->jumbo_max_len;
 
     if (s->num_priority_queues > 1) {