From: Mark Brown <broonie@linaro.org>
Date: Sun, 30 Mar 2014 00:51:27 +0000 (+0000)
Subject: Merge remote-tracking branches 'spi/topic/omap-uwire', 'spi/topic/omap100k', 'spi... 
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=17523680647be26cf792e58f6e8cccb0fd010fd4;p=linux.git

Merge remote-tracking branches 'spi/topic/omap-uwire', 'spi/topic/omap100k', 'spi/topic/omap2', 'spi/topic/orion', 'spi/topic/pl022', 'spi/topic/qup', 'spi/topic/rspi' and 'spi/topic/s3c24xx' into spi-next
---

17523680647be26cf792e58f6e8cccb0fd010fd4
diff --cc drivers/spi/Kconfig
index 5bf7a4f100d21,ba9310bc9acb7,ba9310bc9acb7,205dbfe97e55e,ba9310bc9acb7,581ee2a8856b1,082acbdef1bd9,5072b71baf5e8,ba9310bc9acb7..5dea67c798d5b
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@@@@@@@@@ -376,11 -376,11 -376,11 -376,11 -376,11 -376,11 -376,24 -376,11 -376,11 +376,24 @@@@@@@@@@ config SPI_PXA2XX_PC
         	def_tristate SPI_PXA2XX && PCI
         
         config SPI_RSPI
 ---- ---	tristate "Renesas RSPI controller"
 ++++ +++	tristate "Renesas RSPI/QSPI controller"
         	depends on (SUPERH && SH_DMAE_BASE) || ARCH_SHMOBILE
         	help
 ---- ---	  SPI driver for Renesas RSPI blocks.
 ++++ +++	  SPI driver for Renesas RSPI and QSPI blocks.
 ++++  ++
++++++ ++config SPI_QUP
++++++ ++	tristate "Qualcomm SPI controller with QUP interface"
++++++ ++	depends on ARCH_MSM_DT || (ARM && COMPILE_TEST)
++++++ ++	help
++++++ ++	  Qualcomm Universal Peripheral (QUP) core is an AHB slave that
++++++ ++	  provides a common data path (an output FIFO and an input FIFO)
++++++ ++	  for serial peripheral interface (SPI) mini-core. SPI in master
++++++ ++	  mode supports up to 50MHz, up to four chip selects, programmable
++++++ ++	  data path from 4 bits to 32 bits and numerous protocol variants.
++++++ ++
++++++ ++	  This driver can also be built as a module.  If so, the module
++++++ ++	  will be called spi_qup.
+    +   
         config SPI_S3C24XX
         	tristate "Samsung S3C24XX series SPI"
         	depends on ARCH_S3C24XX
diff --cc drivers/spi/spi-omap-uwire.c
index 8062909b9f5e6,31ce92ff738b2,9313fd3b413df,9313fd3b413df,9313fd3b413df,9313fd3b413df,9313fd3b413df,9313fd3b413df,9313fd3b413df..be2a2e108e2fc
--- a/drivers/spi/spi-omap-uwire.c
+++ b/drivers/spi/spi-omap-uwire.c
@@@@@@@@@@ -332,17 -325,6 -332,23 -332,23 -332,23 -332,23 -332,23 -332,23 -332,23 +325,6 @@@@@@@@@@ static int uwire_setup_transfer(struct 
         
         	uwire = spi_master_get_devdata(spi->master);
         
  -------	if (spi->chip_select > 3) {
  -------		pr_debug("%s: cs%d?\n", dev_name(&spi->dev), spi->chip_select);
  -------		status = -ENODEV;
  -------		goto done;
  -------	}
  -------
- -------	bits = spi->bits_per_word;
- -------	if (t != NULL && t->bits_per_word)
- -------		bits = t->bits_per_word;
- -------
- -------	if (bits > 16) {
- -------		pr_debug("%s: wordsize %d?\n", dev_name(&spi->dev), bits);
- -------		status = -ENODEV;
- -------		goto done;
- -------	}
- -------	ust->bits_per_word = bits;
- -------
         	/* mode 0..3, clock inverted separately;
         	 * standard nCS signaling;
         	 * don't treat DI=high as "not ready"