From: Artyom Tarasenko <atar4qemu@gmail.com>
Date: Sun, 12 Jun 2016 20:19:43 +0000 (+0200)
Subject: target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor mode
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=1a2aefae6627170fdee689b394a65f76080c068a;p=qemu.git

target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor mode

As described in Chapter 5.7.6 of the UltraSPARC Architecture 2005,
outstanding disrupting exceptions that are destined for privileged mode can only
cause a trap when the virtual processor is in nonprivileged or privileged mode and
PSTATE.ie = 1. At all other times, they are held pending.

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
---

diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index f65d8b5c1e..21fe0d1d3e 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -736,8 +736,9 @@ static inline int cpu_interrupts_enabled(CPUSPARCState *env1)
     if (env1->psret != 0)
         return 1;
 #else
-    if (env1->pstate & PS_IE)
+    if ((env1->pstate & PS_IE) && !cpu_hypervisor_mode(env1)) {
         return 1;
+    }
 #endif
 
     return 0;