From: Dmitry Torokhov Date: Thu, 27 Oct 2022 07:46:50 +0000 (-0700) Subject: arm64: dts: qcom: sc7280: fix codec reset line polarity for CRD 3.0/3.1 X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=1caf66104c02d327a2467a69ab18fb24b44e9715;p=linux.git arm64: dts: qcom: sc7280: fix codec reset line polarity for CRD 3.0/3.1 The driver for the codec, when resetting the chip, first drives the line low, and then high. This means that the line is active low. Change the annotation in the DTS accordingly. Fixes: 0a3a56a93fd9 ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 3.0/3.1") Signed-off-by: Dmitry Torokhov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221027074652.1044235-4-dmitry.torokhov@gmail.com --- diff --git a/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi b/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi index a42b5878a75fc..df49564ae6dc1 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi @@ -37,7 +37,7 @@ pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>; pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>; - reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>; + reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>; us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>; qcom,rx-device = <&wcd_rx>;