From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Tue, 17 Sep 2019 01:47:53 +0000 (-0700)
Subject: Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git... 
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=22331f895298bd23ca9f99f6a237aae883c9e1c7;p=linux.git

Merge branch 'x86-cpu-for-linus' of git://git./linux/kernel/git/tip/tip

Pull x86 cpu-feature updates from Ingo Molnar:

 - Rework the Intel model names symbols/macros, which were decades of
   ad-hoc extensions and added random noise. It's now a coherent, easy
   to follow nomenclature.

 - Add new Intel CPU model IDs:
    - "Tiger Lake" desktop and mobile models
    - "Elkhart Lake" model ID
    - and the "Lightning Mountain" variant of Airmont, plus support code

 - Add the new AVX512_VP2INTERSECT instruction to cpufeatures

 - Remove Intel MPX user-visible APIs and the self-tests, because the
   toolchain (gcc) is not supporting it going forward. This is the
   first, lowest-risk phase of MPX removal.

 - Remove X86_FEATURE_MFENCE_RDTSC

 - Various smaller cleanups and fixes

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (25 commits)
  x86/cpu: Update init data for new Airmont CPU model
  x86/cpu: Add new Airmont variant to Intel family
  x86/cpu: Add Elkhart Lake to Intel family
  x86/cpu: Add Tiger Lake to Intel family
  x86: Correct misc typos
  x86/intel: Add common OPTDIFFs
  x86/intel: Aggregate microserver naming
  x86/intel: Aggregate big core graphics naming
  x86/intel: Aggregate big core mobile naming
  x86/intel: Aggregate big core client naming
  x86/cpufeature: Explain the macro duplication
  x86/ftrace: Remove mcount() declaration
  x86/PCI: Remove superfluous returns from void functions
  x86/msr-index: Move AMD MSRs where they belong
  x86/cpu: Use constant definitions for CPU models
  lib: Remove redundant ftrace flag removal
  x86/crash: Remove unnecessary comparison
  x86/bitops: Use __builtin_constant_p() directly instead of IS_IMMEDIATE()
  x86: Remove X86_FEATURE_MFENCE_RDTSC
  x86/mpx: Remove MPX APIs
  ...
---

22331f895298bd23ca9f99f6a237aae883c9e1c7
diff --cc arch/x86/include/asm/msr-index.h
index de753206b4274,695881ef682c3..20ce682a2540f
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@@ -375,13 -375,10 +375,14 @@@
  /* Alternative perfctr range with full access. */
  #define MSR_IA32_PMC0			0x000004c1
  
 +/* Auto-reload via MSR instead of DS area */
 +#define MSR_RELOAD_PMC0			0x000014c1
 +#define MSR_RELOAD_FIXED_CTR0		0x00001309
 +
- /* AMD64 MSRs. Not complete. See the architecture manual for a more
-    complete list. */
- 
+ /*
+  * AMD64 MSRs. Not complete. See the architecture manual for a more
+  * complete list.
+  */
  #define MSR_AMD64_PATCH_LEVEL		0x0000008b
  #define MSR_AMD64_TSC_RATIO		0xc0000104
  #define MSR_AMD64_NB_CFG		0xc001001f