From: Peter Maydell <peter.maydell@linaro.org>
Date: Tue, 19 Aug 2014 17:56:24 +0000 (+0100)
Subject: target-arm: Fix return address for A64 BRK instructions
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=229a138d740142885dd4e7063e25147d7f71fdef;p=qemu.git

target-arm: Fix return address for A64 BRK instructions

When we take an exception resulting from a BRK instruction,
the architecture requires that the "preferred return address"
reported to the exception handler is the address of the BRK
itself, not the following instruction (like undefined
insns, and in contrast with SVC, HVC and SMC). Follow this,
rather than incorrectly reporting the address of the following
insn.

(We do get this correct for the A32/T32 BKPT insns.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-stable@nongnu.org
---

diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index f04ca49631..2e21948df0 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -1456,7 +1456,7 @@ static void disas_exc(DisasContext *s, uint32_t insn)
             break;
         }
         /* BRK */
-        gen_exception_insn(s, 0, EXCP_BKPT, syn_aa64_bkpt(imm16));
+        gen_exception_insn(s, 4, EXCP_BKPT, syn_aa64_bkpt(imm16));
         break;
     case 2:
         if (op2_ll != 0) {