From: Marek Vasut <marex@denx.de>
Date: Sun, 11 Dec 2022 02:48:57 +0000 (+0100)
Subject: dt-bindings: imx6q-pcie: Handle various clock configurations
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=22c9f19002c7536b30bc15b6fb6276d62be2f758;p=linux.git

dt-bindings: imx6q-pcie: Handle various clock configurations

The i.MX SoCs have various clock configurations routed into the PCIe IP,
the list of clock is below. Document all those configurations in the DT
binding document.

All SoCs: pcie, pcie_bus
6QDL, 7D: + pcie_phy
6SX:      + pcie_phy          pcie_inbound_axi
8MQ:      + pcie_phy pcie_aux
8MM, 8MP: +          pcie_aux

Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20221211024859.672076-1-marex@denx.de
Signed-off-by: Rob Herring <robh@kernel.org>
---

diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index 49b4f7a32e71e..5d74d914a830a 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -57,7 +57,7 @@ properties:
     items:
       - const: pcie
       - const: pcie_bus
-      - const: pcie_phy
+      - enum: [ pcie_phy, pcie_aux ]
       - enum: [ pcie_inbound_axi, pcie_aux ]
 
   num-lanes:
@@ -185,7 +185,7 @@ allOf:
           items:
             - {}
             - {}
-            - {}
+            - const: pcie_phy
             - const: pcie_inbound_axi
   - if:
       properties:
@@ -198,7 +198,7 @@ allOf:
           items:
             - {}
             - {}
-            - {}
+            - const: pcie_phy
             - const: pcie_aux
   - if:
       properties:
@@ -208,10 +208,41 @@ allOf:
               enum:
                 - fsl,imx6sx-pcie
                 - fsl,imx8mq-pcie
+    then:
+      properties:
+        clocks:
+          maxItems: 3
+        clock-names:
+          maxItems: 3
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - fsl,imx6q-pcie
+              - fsl,imx6qp-pcie
+              - fsl,imx7d-pcie
+    then:
+      properties:
+        clock-names:
+          maxItems: 3
+          contains:
+            const: pcie_phy
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - fsl,imx8mm-pcie
+              - fsl,imx8mp-pcie
     then:
       properties:
         clock-names:
           maxItems: 3
+          contains:
+            const: pcie_aux
 
 unevaluatedProperties: false