From: Alexey Minnekhanov Date: Fri, 17 Apr 2020 01:26:30 +0000 (+0300) Subject: arm64: dts: qcom: Add Xiaomi Redmi Note 7 (lavender) X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=23a6da79fe8b7f0b5725b40126a7b0638c016ef3;p=linux.git arm64: dts: qcom: Add Xiaomi Redmi Note 7 (lavender) This adds the initial device tree support for Xiaomi Redmi Note 7 (codename lavender) phone. It is based on SDM660 SoC. Currently it can be booted into initrd with a shell over UART and you can also get kernel boot logs from a pstore-ramoops. Signed-off-by: Alexey Minnekhanov Link: https://lore.kernel.org/r/20200417012630.222352-4-alexey.min@gmail.com Signed-off-by: Bjorn Andersson --- diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index cc103f7020fd6..0f2c33d611df0 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -16,6 +16,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-hp-envy-x2.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-lenovo-miix-630.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-lavender.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts new file mode 100644 index 0000000000000..76533e8b20921 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, Alexey Minnekhanov + */ + +/dts-v1/; + +#include "sdm660.dtsi" + +/ { + model = "Xiaomi Redmi Note 7"; + compatible = "xiaomi,lavender", "qcom,sdm660"; + + aliases { + serial0 = &blsp1_uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@a0000000 { + compatible = "ramoops"; + reg = <0x0 0xa0000000 0x0 0x400000>; + console-size = <0x20000>; + record-size = <0x20000>; + ftrace-size = <0x0>; + pmsg-size = <0x20000>; + }; + }; +}; + +&blsp1_uart2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart_console_active>; +}; + +&tlmm { + gpio-reserved-ranges = <8 4>; +};