From: Ben Skeggs Date: Sat, 16 Jan 2021 06:17:21 +0000 (+1000) Subject: drm/nouveau/privring: rename from ibus X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=26fbb4c8c7c3ee9a4c3b4de555a8587b5a19154e;p=linux.git drm/nouveau/privring: rename from ibus Signed-off-by: Ben Skeggs Reviewed-by: Lyude Paul --- diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h index b1b1c4c0bcbe2..9a4f54d0f8507 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h @@ -3,7 +3,7 @@ NVKM_LAYOUT_ONCE(NVKM_SUBDEV_PCI , struct nvkm_pci , pci) NVKM_LAYOUT_ONCE(NVKM_SUBDEV_VBIOS , struct nvkm_bios , bios) NVKM_LAYOUT_ONCE(NVKM_SUBDEV_DEVINIT , struct nvkm_devinit , devinit) NVKM_LAYOUT_ONCE(NVKM_SUBDEV_TOP , struct nvkm_top , top) -NVKM_LAYOUT_ONCE(NVKM_SUBDEV_IBUS , struct nvkm_subdev , ibus) +NVKM_LAYOUT_ONCE(NVKM_SUBDEV_PRIVRING, struct nvkm_subdev , privring) NVKM_LAYOUT_ONCE(NVKM_SUBDEV_GPIO , struct nvkm_gpio , gpio) NVKM_LAYOUT_ONCE(NVKM_SUBDEV_I2C , struct nvkm_i2c , i2c) NVKM_LAYOUT_ONCE(NVKM_SUBDEV_FUSE , struct nvkm_fuse , fuse) diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/ibus.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/ibus.h deleted file mode 100644 index f5da256315cfe..0000000000000 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/ibus.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -#ifndef __NVKM_IBUS_H__ -#define __NVKM_IBUS_H__ -#include - -int gf100_ibus_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **); -int gf117_ibus_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **); -int gk104_ibus_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **); -int gk20a_ibus_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **); -int gm200_ibus_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **); -int gp10b_ibus_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **); -#endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/privring.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/privring.h new file mode 100644 index 0000000000000..e1399f8a90ad9 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/privring.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: MIT */ +#ifndef __NVKM_PRIVRING_H__ +#define __NVKM_PRIVRING_H__ +#include + +int gf100_privring_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **); +int gf117_privring_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **); +int gk104_privring_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **); +int gk20a_privring_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **); +int gm200_privring_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **); +int gp10b_privring_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **); +#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 35ad59c1aaaa8..48447352775e3 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -1347,7 +1347,6 @@ nvc0_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, g94_gpio_new }, .i2c = { 0x00000001, g94_i2c_new }, - .ibus = { 0x00000001, gf100_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gf100_ltc_new }, @@ -1356,6 +1355,7 @@ nvc0_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gf100_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, + .privring = { 0x00000001, gf100_privring_new }, .therm = { 0x00000001, gt215_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, @@ -1383,7 +1383,6 @@ nvc1_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, g94_gpio_new }, .i2c = { 0x00000001, g94_i2c_new }, - .ibus = { 0x00000001, gf100_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gf100_ltc_new }, @@ -1392,6 +1391,7 @@ nvc1_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gf106_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, + .privring = { 0x00000001, gf100_privring_new }, .therm = { 0x00000001, gt215_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, @@ -1419,7 +1419,6 @@ nvc3_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, g94_gpio_new }, .i2c = { 0x00000001, g94_i2c_new }, - .ibus = { 0x00000001, gf100_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gf100_ltc_new }, @@ -1428,6 +1427,7 @@ nvc3_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gf106_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, + .privring = { 0x00000001, gf100_privring_new }, .therm = { 0x00000001, gt215_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, @@ -1455,7 +1455,6 @@ nvc4_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, g94_gpio_new }, .i2c = { 0x00000001, g94_i2c_new }, - .ibus = { 0x00000001, gf100_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gf100_ltc_new }, @@ -1464,6 +1463,7 @@ nvc4_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gf100_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, + .privring = { 0x00000001, gf100_privring_new }, .therm = { 0x00000001, gt215_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, @@ -1491,7 +1491,6 @@ nvc8_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, g94_gpio_new }, .i2c = { 0x00000001, g94_i2c_new }, - .ibus = { 0x00000001, gf100_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gf100_ltc_new }, @@ -1500,6 +1499,7 @@ nvc8_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gf100_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, + .privring = { 0x00000001, gf100_privring_new }, .therm = { 0x00000001, gt215_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, @@ -1527,7 +1527,6 @@ nvce_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, g94_gpio_new }, .i2c = { 0x00000001, g94_i2c_new }, - .ibus = { 0x00000001, gf100_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gf100_ltc_new }, @@ -1536,6 +1535,7 @@ nvce_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gf100_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, + .privring = { 0x00000001, gf100_privring_new }, .therm = { 0x00000001, gt215_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, @@ -1563,7 +1563,6 @@ nvcf_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, g94_gpio_new }, .i2c = { 0x00000001, g94_i2c_new }, - .ibus = { 0x00000001, gf100_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gf100_ltc_new }, @@ -1572,6 +1571,7 @@ nvcf_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gf106_pci_new }, .pmu = { 0x00000001, gf100_pmu_new }, + .privring = { 0x00000001, gf100_privring_new }, .therm = { 0x00000001, gt215_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, @@ -1599,7 +1599,6 @@ nvd7_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, gf119_gpio_new }, .i2c = { 0x00000001, gf117_i2c_new }, - .ibus = { 0x00000001, gf117_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gf100_ltc_new }, @@ -1607,6 +1606,7 @@ nvd7_chipset = { .mmu = { 0x00000001, gf100_mmu_new }, .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gf106_pci_new }, + .privring = { 0x00000001, gf117_privring_new }, .therm = { 0x00000001, gf119_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf117_volt_new }, @@ -1634,7 +1634,6 @@ nvd9_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, gf119_gpio_new }, .i2c = { 0x00000001, gf119_i2c_new }, - .ibus = { 0x00000001, gf117_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gf100_ltc_new }, @@ -1643,6 +1642,7 @@ nvd9_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gf106_pci_new }, .pmu = { 0x00000001, gf119_pmu_new }, + .privring = { 0x00000001, gf117_privring_new }, .therm = { 0x00000001, gf119_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, @@ -1670,7 +1670,6 @@ nve4_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gk104_i2c_new }, - .ibus = { 0x00000001, gk104_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gk104_ltc_new }, @@ -1679,6 +1678,7 @@ nve4_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk104_pmu_new }, + .privring = { 0x00000001, gk104_privring_new }, .therm = { 0x00000001, gk104_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -1707,7 +1707,6 @@ nve6_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gk104_i2c_new }, - .ibus = { 0x00000001, gk104_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gk104_ltc_new }, @@ -1716,6 +1715,7 @@ nve6_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk104_pmu_new }, + .privring = { 0x00000001, gk104_privring_new }, .therm = { 0x00000001, gk104_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -1744,7 +1744,6 @@ nve7_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gk104_i2c_new }, - .ibus = { 0x00000001, gk104_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gk104_ltc_new }, @@ -1753,6 +1752,7 @@ nve7_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk104_pmu_new }, + .privring = { 0x00000001, gk104_privring_new }, .therm = { 0x00000001, gk104_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -1777,12 +1777,12 @@ nvea_chipset = { .clk = { 0x00000001, gk20a_clk_new }, .fb = { 0x00000001, gk20a_fb_new }, .fuse = { 0x00000001, gf100_fuse_new }, - .ibus = { 0x00000001, gk20a_ibus_new }, .imem = { 0x00000001, gk20a_instmem_new }, .ltc = { 0x00000001, gk104_ltc_new }, .mc = { 0x00000001, gk20a_mc_new }, .mmu = { 0x00000001, gk20a_mmu_new }, .pmu = { 0x00000001, gk20a_pmu_new }, + .privring = { 0x00000001, gk20a_privring_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gk20a_volt_new }, @@ -1806,7 +1806,6 @@ nvf0_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gk110_i2c_new }, - .ibus = { 0x00000001, gk104_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gk104_ltc_new }, @@ -1815,6 +1814,7 @@ nvf0_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk110_pmu_new }, + .privring = { 0x00000001, gk104_privring_new }, .therm = { 0x00000001, gk104_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -1842,7 +1842,6 @@ nvf1_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gk110_i2c_new }, - .ibus = { 0x00000001, gk104_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gk104_ltc_new }, @@ -1851,6 +1850,7 @@ nvf1_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk110_pmu_new }, + .privring = { 0x00000001, gk104_privring_new }, .therm = { 0x00000001, gk104_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -1878,7 +1878,6 @@ nv106_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gk110_i2c_new }, - .ibus = { 0x00000001, gk104_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gk104_ltc_new }, @@ -1887,6 +1886,7 @@ nv106_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk208_pmu_new }, + .privring = { 0x00000001, gk104_privring_new }, .therm = { 0x00000001, gk104_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -1914,7 +1914,6 @@ nv108_chipset = { .fuse = { 0x00000001, gf100_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gk110_i2c_new }, - .ibus = { 0x00000001, gk104_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gk104_ltc_new }, @@ -1923,6 +1922,7 @@ nv108_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gk208_pmu_new }, + .privring = { 0x00000001, gk104_privring_new }, .therm = { 0x00000001, gk104_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -1950,7 +1950,6 @@ nv117_chipset = { .fuse = { 0x00000001, gm107_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gk110_i2c_new }, - .ibus = { 0x00000001, gk104_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gm107_ltc_new }, @@ -1959,6 +1958,7 @@ nv117_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gm107_pmu_new }, + .privring = { 0x00000001, gk104_privring_new }, .therm = { 0x00000001, gm107_therm_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -1985,7 +1985,6 @@ nv118_chipset = { .fuse = { 0x00000001, gm107_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gk110_i2c_new }, - .ibus = { 0x00000001, gk104_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gm107_ltc_new }, @@ -1994,6 +1993,7 @@ nv118_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gm107_pmu_new }, + .privring = { 0x00000001, gk104_privring_new }, .therm = { 0x00000001, gm107_therm_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -2018,7 +2018,6 @@ nv120_chipset = { .fuse = { 0x00000001, gm107_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gm200_ltc_new }, @@ -2027,6 +2026,7 @@ nv120_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gm200_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .therm = { 0x00000001, gm200_therm_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -2053,7 +2053,6 @@ nv124_chipset = { .fuse = { 0x00000001, gm107_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gm200_ltc_new }, @@ -2062,6 +2061,7 @@ nv124_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gm200_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .therm = { 0x00000001, gm200_therm_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -2088,7 +2088,6 @@ nv126_chipset = { .fuse = { 0x00000001, gm107_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .iccsense = { 0x00000001, gf100_iccsense_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gm200_ltc_new }, @@ -2097,6 +2096,7 @@ nv126_chipset = { .mxm = { 0x00000001, nv50_mxm_new }, .pci = { 0x00000001, gk104_pci_new }, .pmu = { 0x00000001, gm200_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .therm = { 0x00000001, gm200_therm_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -2120,12 +2120,12 @@ nv12b_chipset = { .clk = { 0x00000001, gm20b_clk_new }, .fb = { 0x00000001, gm20b_fb_new }, .fuse = { 0x00000001, gm107_fuse_new }, - .ibus = { 0x00000001, gk20a_ibus_new }, .imem = { 0x00000001, gk20a_instmem_new }, .ltc = { 0x00000001, gm200_ltc_new }, .mc = { 0x00000001, gk20a_mc_new }, .mmu = { 0x00000001, gm20b_mmu_new }, .pmu = { 0x00000001, gm20b_pmu_new }, + .privring = { 0x00000001, gk20a_privring_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gm20b_volt_new }, @@ -2149,7 +2149,6 @@ nv130_chipset = { .fuse = { 0x00000001, gm107_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gp100_ltc_new }, .mc = { 0x00000001, gp100_mc_new }, @@ -2157,6 +2156,7 @@ nv130_chipset = { .therm = { 0x00000001, gp100_therm_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gm200_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000003f, gp100_ce_new }, @@ -2182,7 +2182,6 @@ nv132_chipset = { .fuse = { 0x00000001, gm107_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gp102_ltc_new }, .mc = { 0x00000001, gp100_mc_new }, @@ -2190,6 +2189,7 @@ nv132_chipset = { .therm = { 0x00000001, gp100_therm_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000000f, gp102_ce_new }, @@ -2216,7 +2216,6 @@ nv134_chipset = { .fuse = { 0x00000001, gm107_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gp102_ltc_new }, .mc = { 0x00000001, gp100_mc_new }, @@ -2224,6 +2223,7 @@ nv134_chipset = { .therm = { 0x00000001, gp100_therm_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000000f, gp102_ce_new }, @@ -2250,7 +2250,6 @@ nv136_chipset = { .fuse = { 0x00000001, gm107_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gp102_ltc_new }, .mc = { 0x00000001, gp100_mc_new }, @@ -2258,6 +2257,7 @@ nv136_chipset = { .therm = { 0x00000001, gp100_therm_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000000f, gp102_ce_new }, @@ -2284,7 +2284,6 @@ nv137_chipset = { .fuse = { 0x00000001, gm107_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gp102_ltc_new }, .mc = { 0x00000001, gp100_mc_new }, @@ -2292,6 +2291,7 @@ nv137_chipset = { .therm = { 0x00000001, gp100_therm_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000000f, gp102_ce_new }, @@ -2318,7 +2318,6 @@ nv138_chipset = { .fuse = { 0x00000001, gm107_fuse_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gp102_ltc_new }, .mc = { 0x00000001, gp100_mc_new }, @@ -2326,6 +2325,7 @@ nv138_chipset = { .therm = { 0x00000001, gp100_therm_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000000f, gp102_ce_new }, @@ -2347,12 +2347,12 @@ nv13b_chipset = { .fault = { 0x00000001, gp10b_fault_new }, .fb = { 0x00000001, gp10b_fb_new }, .fuse = { 0x00000001, gm107_fuse_new }, - .ibus = { 0x00000001, gp10b_ibus_new }, .imem = { 0x00000001, gk20a_instmem_new }, .ltc = { 0x00000001, gp10b_ltc_new }, .mc = { 0x00000001, gp10b_mc_new }, .mmu = { 0x00000001, gp10b_mmu_new }, .pmu = { 0x00000001, gp10b_pmu_new }, + .privring = { 0x00000001, gp10b_privring_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x00000001, gp100_ce_new }, @@ -2376,13 +2376,13 @@ nv140_chipset = { .gpio = { 0x00000001, gk104_gpio_new }, .gsp = { 0x00000001, gv100_gsp_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gp102_ltc_new }, .mc = { 0x00000001, gp100_mc_new }, .mmu = { 0x00000001, gv100_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .therm = { 0x00000001, gp100_therm_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -2410,13 +2410,13 @@ nv162_chipset = { .gpio = { 0x00000001, gk104_gpio_new }, .gsp = { 0x00000001, gv100_gsp_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gp102_ltc_new }, .mc = { 0x00000001, tu102_mc_new }, .mmu = { 0x00000001, tu102_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .therm = { 0x00000001, gp100_therm_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -2444,13 +2444,13 @@ nv164_chipset = { .gpio = { 0x00000001, gk104_gpio_new }, .gsp = { 0x00000001, gv100_gsp_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gp102_ltc_new }, .mc = { 0x00000001, tu102_mc_new }, .mmu = { 0x00000001, tu102_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .therm = { 0x00000001, gp100_therm_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -2478,13 +2478,13 @@ nv166_chipset = { .gpio = { 0x00000001, gk104_gpio_new }, .gsp = { 0x00000001, gv100_gsp_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gp102_ltc_new }, .mc = { 0x00000001, tu102_mc_new }, .mmu = { 0x00000001, tu102_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .therm = { 0x00000001, gp100_therm_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -2512,13 +2512,13 @@ nv167_chipset = { .gpio = { 0x00000001, gk104_gpio_new }, .gsp = { 0x00000001, gv100_gsp_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gp102_ltc_new }, .mc = { 0x00000001, tu102_mc_new }, .mmu = { 0x00000001, tu102_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .therm = { 0x00000001, gp100_therm_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -2546,13 +2546,13 @@ nv168_chipset = { .gpio = { 0x00000001, gk104_gpio_new }, .gsp = { 0x00000001, gv100_gsp_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .ltc = { 0x00000001, gp102_ltc_new }, .mc = { 0x00000001, tu102_mc_new }, .mmu = { 0x00000001, tu102_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, .pmu = { 0x00000001, gp102_pmu_new }, + .privring = { 0x00000001, gm200_privring_new }, .therm = { 0x00000001, gp100_therm_new }, .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, @@ -2575,11 +2575,11 @@ nv170_chipset = { .fb = { 0x00000001, ga100_fb_new }, .gpio = { 0x00000001, gk104_gpio_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .mc = { 0x00000001, ga100_mc_new }, .mmu = { 0x00000001, tu102_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, + .privring = { 0x00000001, gm200_privring_new }, .timer = { 0x00000001, gk20a_timer_new }, }; @@ -2592,11 +2592,11 @@ nv172_chipset = { .fb = { 0x00000001, ga102_fb_new }, .gpio = { 0x00000001, ga102_gpio_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .mc = { 0x00000001, ga100_mc_new }, .mmu = { 0x00000001, tu102_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, + .privring = { 0x00000001, gm200_privring_new }, .timer = { 0x00000001, gk20a_timer_new }, .disp = { 0x00000001, ga102_disp_new }, .dma = { 0x00000001, gv100_dma_new }, @@ -2611,11 +2611,11 @@ nv174_chipset = { .fb = { 0x00000001, ga102_fb_new }, .gpio = { 0x00000001, ga102_gpio_new }, .i2c = { 0x00000001, gm200_i2c_new }, - .ibus = { 0x00000001, gm200_ibus_new }, .imem = { 0x00000001, nv50_instmem_new }, .mc = { 0x00000001, ga100_mc_new }, .mmu = { 0x00000001, tu102_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, + .privring = { 0x00000001, gm200_privring_new }, .timer = { 0x00000001, gk20a_timer_new }, .disp = { 0x00000001, ga102_disp_new }, .dma = { 0x00000001, gv100_dma_new }, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h index 54eab5e042307..93949b3c72143 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include @@ -24,6 +23,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/Kbuild index fb4fff1222afe..2cb24fff7e321 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/Kbuild @@ -11,7 +11,6 @@ include $(src)/nvkm/subdev/fuse/Kbuild include $(src)/nvkm/subdev/gpio/Kbuild include $(src)/nvkm/subdev/gsp/Kbuild include $(src)/nvkm/subdev/i2c/Kbuild -include $(src)/nvkm/subdev/ibus/Kbuild include $(src)/nvkm/subdev/iccsense/Kbuild include $(src)/nvkm/subdev/instmem/Kbuild include $(src)/nvkm/subdev/ltc/Kbuild @@ -20,6 +19,7 @@ include $(src)/nvkm/subdev/mmu/Kbuild include $(src)/nvkm/subdev/mxm/Kbuild include $(src)/nvkm/subdev/pci/Kbuild include $(src)/nvkm/subdev/pmu/Kbuild +include $(src)/nvkm/subdev/privring/Kbuild include $(src)/nvkm/subdev/therm/Kbuild include $(src)/nvkm/subdev/timer/Kbuild include $(src)/nvkm/subdev/top/Kbuild diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.c index 7f35bb87445d3..53a6651ac2258 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.c @@ -40,7 +40,7 @@ gf100_bus_intr(struct nvkm_bus *bus) (addr & 0x00000002) ? "write" : "read", data, (addr & 0x00fffffc), (stat & 0x00000002) ? "!ENGINE " : "", - (stat & 0x00000004) ? "IBUS " : "", + (stat & 0x00000004) ? "PRIVRING " : "", (stat & 0x00000008) ? "TIMEOUT " : ""); nvkm_wr32(device, 0x009084, 0x00000000); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/Kbuild deleted file mode 100644 index 127efb51f67df..0000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/Kbuild +++ /dev/null @@ -1,7 +0,0 @@ -# SPDX-License-Identifier: MIT -nvkm-y += nvkm/subdev/ibus/gf100.o -nvkm-y += nvkm/subdev/ibus/gf117.o -nvkm-y += nvkm/subdev/ibus/gk104.o -nvkm-y += nvkm/subdev/ibus/gk20a.o -nvkm-y += nvkm/subdev/ibus/gm200.o -nvkm-y += nvkm/subdev/ibus/gp10b.o diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c deleted file mode 100644 index 1213f990323e6..0000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c +++ /dev/null @@ -1,122 +0,0 @@ -/* - * Copyright 2012 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: Ben Skeggs - */ -#include "priv.h" -#include - -static void -gf100_ibus_intr_hub(struct nvkm_subdev *ibus, int i) -{ - struct nvkm_device *device = ibus->device; - u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0400)); - u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0400)); - u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0400)); - nvkm_debug(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat); -} - -static void -gf100_ibus_intr_rop(struct nvkm_subdev *ibus, int i) -{ - struct nvkm_device *device = ibus->device; - u32 addr = nvkm_rd32(device, 0x124120 + (i * 0x0400)); - u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0400)); - u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0400)); - nvkm_debug(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat); -} - -static void -gf100_ibus_intr_gpc(struct nvkm_subdev *ibus, int i) -{ - struct nvkm_device *device = ibus->device; - u32 addr = nvkm_rd32(device, 0x128120 + (i * 0x0400)); - u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0400)); - u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0400)); - nvkm_debug(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat); -} - -void -gf100_ibus_intr(struct nvkm_subdev *ibus) -{ - struct nvkm_device *device = ibus->device; - u32 intr0 = nvkm_rd32(device, 0x121c58); - u32 intr1 = nvkm_rd32(device, 0x121c5c); - u32 hubnr = nvkm_rd32(device, 0x121c70); - u32 ropnr = nvkm_rd32(device, 0x121c74); - u32 gpcnr = nvkm_rd32(device, 0x121c78); - u32 i; - - for (i = 0; (intr0 & 0x0000ff00) && i < hubnr; i++) { - u32 stat = 0x00000100 << i; - if (intr0 & stat) { - gf100_ibus_intr_hub(ibus, i); - intr0 &= ~stat; - } - } - - for (i = 0; (intr0 & 0xffff0000) && i < ropnr; i++) { - u32 stat = 0x00010000 << i; - if (intr0 & stat) { - gf100_ibus_intr_rop(ibus, i); - intr0 &= ~stat; - } - } - - for (i = 0; intr1 && i < gpcnr; i++) { - u32 stat = 0x00000001 << i; - if (intr1 & stat) { - gf100_ibus_intr_gpc(ibus, i); - intr1 &= ~stat; - } - } - - nvkm_mask(device, 0x121c4c, 0x0000003f, 0x00000002); - nvkm_msec(device, 2000, - if (!(nvkm_rd32(device, 0x121c4c) & 0x0000003f)) - break; - ); -} - -static int -gf100_ibus_init(struct nvkm_subdev *ibus) -{ - struct nvkm_device *device = ibus->device; - nvkm_mask(device, 0x122310, 0x0003ffff, 0x00000800); - nvkm_wr32(device, 0x12232c, 0x00100064); - nvkm_wr32(device, 0x122330, 0x00100064); - nvkm_wr32(device, 0x122334, 0x00100064); - nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000100); - return 0; -} - -static const struct nvkm_subdev_func -gf100_ibus = { - .init = gf100_ibus_init, - .intr = gf100_ibus_intr, -}; - -int -gf100_ibus_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_subdev **pibus) -{ - return nvkm_subdev_new_(&gf100_ibus, device, type, inst, pibus); -} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf117.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf117.c deleted file mode 100644 index e4e545f4d8934..0000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf117.c +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright 2015 Samuel Pitosiet - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: Samuel Pitoiset - */ -#include "priv.h" - -static int -gf117_ibus_init(struct nvkm_subdev *ibus) -{ - struct nvkm_device *device = ibus->device; - nvkm_mask(device, 0x122310, 0x0003ffff, 0x00000800); - nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000100); - nvkm_mask(device, 0x1223b0, 0x0003ffff, 0x00000fff); - return 0; -} - -static const struct nvkm_subdev_func -gf117_ibus = { - .init = gf117_ibus_init, - .intr = gf100_ibus_intr, -}; - -int -gf117_ibus_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_subdev **pibus) -{ - return nvkm_subdev_new_(&gf117_ibus, device, type, inst, pibus); -} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c deleted file mode 100644 index 36cae20b31953..0000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright 2012 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: Ben Skeggs - */ -#include "priv.h" -#include - -static void -gk104_ibus_intr_hub(struct nvkm_subdev *ibus, int i) -{ - struct nvkm_device *device = ibus->device; - u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0800)); - u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0800)); - u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0800)); - nvkm_debug(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat); -} - -static void -gk104_ibus_intr_rop(struct nvkm_subdev *ibus, int i) -{ - struct nvkm_device *device = ibus->device; - u32 addr = nvkm_rd32(device, 0x124120 + (i * 0x0800)); - u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0800)); - u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0800)); - nvkm_debug(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat); -} - -static void -gk104_ibus_intr_gpc(struct nvkm_subdev *ibus, int i) -{ - struct nvkm_device *device = ibus->device; - u32 addr = nvkm_rd32(device, 0x128120 + (i * 0x0800)); - u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0800)); - u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0800)); - nvkm_debug(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat); -} - -void -gk104_ibus_intr(struct nvkm_subdev *ibus) -{ - struct nvkm_device *device = ibus->device; - u32 intr0 = nvkm_rd32(device, 0x120058); - u32 intr1 = nvkm_rd32(device, 0x12005c); - u32 hubnr = nvkm_rd32(device, 0x120070); - u32 ropnr = nvkm_rd32(device, 0x120074); - u32 gpcnr = nvkm_rd32(device, 0x120078); - u32 i; - - for (i = 0; (intr0 & 0x0000ff00) && i < hubnr; i++) { - u32 stat = 0x00000100 << i; - if (intr0 & stat) { - gk104_ibus_intr_hub(ibus, i); - intr0 &= ~stat; - } - } - - for (i = 0; (intr0 & 0xffff0000) && i < ropnr; i++) { - u32 stat = 0x00010000 << i; - if (intr0 & stat) { - gk104_ibus_intr_rop(ibus, i); - intr0 &= ~stat; - } - } - - for (i = 0; intr1 && i < gpcnr; i++) { - u32 stat = 0x00000001 << i; - if (intr1 & stat) { - gk104_ibus_intr_gpc(ibus, i); - intr1 &= ~stat; - } - } - - nvkm_mask(device, 0x12004c, 0x0000003f, 0x00000002); - nvkm_msec(device, 2000, - if (!(nvkm_rd32(device, 0x12004c) & 0x0000003f)) - break; - ); -} - -static int -gk104_ibus_init(struct nvkm_subdev *ibus) -{ - struct nvkm_device *device = ibus->device; - nvkm_mask(device, 0x122318, 0x0003ffff, 0x00001000); - nvkm_mask(device, 0x12231c, 0x0003ffff, 0x00000200); - nvkm_mask(device, 0x122310, 0x0003ffff, 0x00000800); - nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000100); - nvkm_mask(device, 0x1223b0, 0x0003ffff, 0x00000fff); - nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000200); - nvkm_mask(device, 0x122358, 0x0003ffff, 0x00002880); - return 0; -} - -static const struct nvkm_subdev_func -gk104_ibus = { - .preinit = gk104_ibus_init, - .init = gk104_ibus_init, - .intr = gk104_ibus_intr, -}; - -int -gk104_ibus_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_subdev **pibus) -{ - return nvkm_subdev_new_(&gk104_ibus, device, type, inst, pibus); -} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk20a.c deleted file mode 100644 index ece073a1cc5a0..0000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk20a.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#include -#include - -static void -gk20a_ibus_init_ibus_ring(struct nvkm_subdev *ibus) -{ - struct nvkm_device *device = ibus->device; - nvkm_mask(device, 0x137250, 0x3f, 0); - - nvkm_mask(device, 0x000200, 0x20, 0); - udelay(20); - nvkm_mask(device, 0x000200, 0x20, 0x20); - - nvkm_wr32(device, 0x12004c, 0x4); - nvkm_wr32(device, 0x122204, 0x2); - nvkm_rd32(device, 0x122204); - - /* - * Bug: increase clock timeout to avoid operation failure at high - * gpcclk rate. - */ - nvkm_wr32(device, 0x122354, 0x800); - nvkm_wr32(device, 0x128328, 0x800); - nvkm_wr32(device, 0x124320, 0x800); -} - -static void -gk20a_ibus_intr(struct nvkm_subdev *ibus) -{ - struct nvkm_device *device = ibus->device; - u32 status0 = nvkm_rd32(device, 0x120058); - - if (status0 & 0x7) { - nvkm_debug(ibus, "resetting ibus ring\n"); - gk20a_ibus_init_ibus_ring(ibus); - } - - /* Acknowledge interrupt */ - nvkm_mask(device, 0x12004c, 0x2, 0x2); - nvkm_msec(device, 2000, - if (!(nvkm_rd32(device, 0x12004c) & 0x0000003f)) - break; - ); -} - -static int -gk20a_ibus_init(struct nvkm_subdev *ibus) -{ - gk20a_ibus_init_ibus_ring(ibus); - return 0; -} - -static const struct nvkm_subdev_func -gk20a_ibus = { - .init = gk20a_ibus_init, - .intr = gk20a_ibus_intr, -}; - -int -gk20a_ibus_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_subdev **pibus) -{ - return nvkm_subdev_new_(&gk20a_ibus, device, type, inst, pibus); -} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gm200.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gm200.c deleted file mode 100644 index 7973e603e0310..0000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gm200.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright 2015 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: Ben Skeggs - */ -#include "priv.h" - -static const struct nvkm_subdev_func -gm200_ibus = { - .intr = gk104_ibus_intr, -}; - -int -gm200_ibus_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_subdev **pibus) -{ - return nvkm_subdev_new_(&gm200_ibus, device, type, inst, pibus); -} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gp10b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gp10b.c deleted file mode 100644 index 611341afc6851..0000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gp10b.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#include - -#include "priv.h" - -static int -gp10b_ibus_init(struct nvkm_subdev *ibus) -{ - struct nvkm_device *device = ibus->device; - - nvkm_wr32(device, 0x1200a8, 0x0); - - /* init ring */ - nvkm_wr32(device, 0x12004c, 0x4); - nvkm_wr32(device, 0x122204, 0x2); - nvkm_rd32(device, 0x122204); - - /* timeout configuration */ - nvkm_wr32(device, 0x009080, 0x800186a0); - - return 0; -} - -static const struct nvkm_subdev_func -gp10b_ibus = { - .init = gp10b_ibus_init, - .intr = gk104_ibus_intr, -}; - -int -gp10b_ibus_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_subdev **pibus) -{ - return nvkm_subdev_new_(&gp10b_ibus, device, type, inst, pibus); -} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/priv.h deleted file mode 100644 index 302d69e384d8a..0000000000000 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/ibus/priv.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -#ifndef __NVKM_IBUS_PRIV_H__ -#define __NVKM_IBUS_PRIV_H__ - -#include - -void gf100_ibus_intr(struct nvkm_subdev *); -void gk104_ibus_intr(struct nvkm_subdev *); -#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c index 9e27356bb506b..3a589c6f7fad6 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c @@ -46,7 +46,7 @@ gf100_mc_intr[] = { { 0x00000040, NVKM_ENGINE_CE, 1 }, { 0x00000020, NVKM_ENGINE_CE, 0 }, { 0x00000001, NVKM_ENGINE_MSPPP }, - { 0x40000000, NVKM_SUBDEV_IBUS }, + { 0x40000000, NVKM_SUBDEV_PRIVRING }, { 0x10000000, NVKM_SUBDEV_BUS }, { 0x08000000, NVKM_SUBDEV_FB }, { 0x02000000, NVKM_SUBDEV_LTC }, diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c index afe0d1dbd1f65..d9b9067fa93f5 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c @@ -34,7 +34,7 @@ const struct nvkm_mc_map gk104_mc_intr[] = { { 0x04000000, NVKM_ENGINE_DISP }, { 0x00000100, NVKM_ENGINE_FIFO }, - { 0x40000000, NVKM_SUBDEV_IBUS }, + { 0x40000000, NVKM_SUBDEV_PRIVRING }, { 0x10000000, NVKM_SUBDEV_BUS }, { 0x08000000, NVKM_SUBDEV_FB }, { 0x02000000, NVKM_SUBDEV_LTC }, diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c index 00e8c73f64d3d..5fd1a0595c334 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c @@ -80,7 +80,7 @@ gp100_mc_intr[] = { { 0x04000000, NVKM_ENGINE_DISP }, { 0x00000100, NVKM_ENGINE_FIFO }, { 0x00000200, NVKM_SUBDEV_FAULT }, - { 0x40000000, NVKM_SUBDEV_IBUS }, + { 0x40000000, NVKM_SUBDEV_PRIVRING }, { 0x10000000, NVKM_SUBDEV_BUS }, { 0x08000000, NVKM_SUBDEV_FB }, { 0x02000000, NVKM_SUBDEV_LTC }, diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/privring/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/Kbuild new file mode 100644 index 0000000000000..d47d1bdd0f2b9 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/Kbuild @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: MIT +nvkm-y += nvkm/subdev/privring/gf100.o +nvkm-y += nvkm/subdev/privring/gf117.o +nvkm-y += nvkm/subdev/privring/gk104.o +nvkm-y += nvkm/subdev/privring/gk20a.o +nvkm-y += nvkm/subdev/privring/gm200.o +nvkm-y += nvkm/subdev/privring/gp10b.o diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf100.c new file mode 100644 index 0000000000000..ef7caca703723 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf100.c @@ -0,0 +1,122 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Ben Skeggs + */ +#include "priv.h" +#include + +static void +gf100_privring_intr_hub(struct nvkm_subdev *privring, int i) +{ + struct nvkm_device *device = privring->device; + u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0400)); + u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0400)); + u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0400)); + nvkm_debug(privring, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat); +} + +static void +gf100_privring_intr_rop(struct nvkm_subdev *privring, int i) +{ + struct nvkm_device *device = privring->device; + u32 addr = nvkm_rd32(device, 0x124120 + (i * 0x0400)); + u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0400)); + u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0400)); + nvkm_debug(privring, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat); +} + +static void +gf100_privring_intr_gpc(struct nvkm_subdev *privring, int i) +{ + struct nvkm_device *device = privring->device; + u32 addr = nvkm_rd32(device, 0x128120 + (i * 0x0400)); + u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0400)); + u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0400)); + nvkm_debug(privring, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat); +} + +void +gf100_privring_intr(struct nvkm_subdev *privring) +{ + struct nvkm_device *device = privring->device; + u32 intr0 = nvkm_rd32(device, 0x121c58); + u32 intr1 = nvkm_rd32(device, 0x121c5c); + u32 hubnr = nvkm_rd32(device, 0x121c70); + u32 ropnr = nvkm_rd32(device, 0x121c74); + u32 gpcnr = nvkm_rd32(device, 0x121c78); + u32 i; + + for (i = 0; (intr0 & 0x0000ff00) && i < hubnr; i++) { + u32 stat = 0x00000100 << i; + if (intr0 & stat) { + gf100_privring_intr_hub(privring, i); + intr0 &= ~stat; + } + } + + for (i = 0; (intr0 & 0xffff0000) && i < ropnr; i++) { + u32 stat = 0x00010000 << i; + if (intr0 & stat) { + gf100_privring_intr_rop(privring, i); + intr0 &= ~stat; + } + } + + for (i = 0; intr1 && i < gpcnr; i++) { + u32 stat = 0x00000001 << i; + if (intr1 & stat) { + gf100_privring_intr_gpc(privring, i); + intr1 &= ~stat; + } + } + + nvkm_mask(device, 0x121c4c, 0x0000003f, 0x00000002); + nvkm_msec(device, 2000, + if (!(nvkm_rd32(device, 0x121c4c) & 0x0000003f)) + break; + ); +} + +static int +gf100_privring_init(struct nvkm_subdev *privring) +{ + struct nvkm_device *device = privring->device; + nvkm_mask(device, 0x122310, 0x0003ffff, 0x00000800); + nvkm_wr32(device, 0x12232c, 0x00100064); + nvkm_wr32(device, 0x122330, 0x00100064); + nvkm_wr32(device, 0x122334, 0x00100064); + nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000100); + return 0; +} + +static const struct nvkm_subdev_func +gf100_privring = { + .init = gf100_privring_init, + .intr = gf100_privring_intr, +}; + +int +gf100_privring_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, + struct nvkm_subdev **pprivring) +{ + return nvkm_subdev_new_(&gf100_privring, device, type, inst, pprivring); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf117.c b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf117.c new file mode 100644 index 0000000000000..c78721fcd729f --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf117.c @@ -0,0 +1,47 @@ +/* + * Copyright 2015 Samuel Pitosiet + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Samuel Pitoiset + */ +#include "priv.h" + +static int +gf117_privring_init(struct nvkm_subdev *privring) +{ + struct nvkm_device *device = privring->device; + nvkm_mask(device, 0x122310, 0x0003ffff, 0x00000800); + nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000100); + nvkm_mask(device, 0x1223b0, 0x0003ffff, 0x00000fff); + return 0; +} + +static const struct nvkm_subdev_func +gf117_privring = { + .init = gf117_privring_init, + .intr = gf100_privring_intr, +}; + +int +gf117_privring_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, + struct nvkm_subdev **pprivring) +{ + return nvkm_subdev_new_(&gf117_privring, device, type, inst, pprivring); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk104.c new file mode 100644 index 0000000000000..568a4c0997bd5 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk104.c @@ -0,0 +1,125 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Ben Skeggs + */ +#include "priv.h" +#include + +static void +gk104_privring_intr_hub(struct nvkm_subdev *privring, int i) +{ + struct nvkm_device *device = privring->device; + u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0800)); + u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0800)); + u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0800)); + nvkm_debug(privring, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat); +} + +static void +gk104_privring_intr_rop(struct nvkm_subdev *privring, int i) +{ + struct nvkm_device *device = privring->device; + u32 addr = nvkm_rd32(device, 0x124120 + (i * 0x0800)); + u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0800)); + u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0800)); + nvkm_debug(privring, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat); +} + +static void +gk104_privring_intr_gpc(struct nvkm_subdev *privring, int i) +{ + struct nvkm_device *device = privring->device; + u32 addr = nvkm_rd32(device, 0x128120 + (i * 0x0800)); + u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0800)); + u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0800)); + nvkm_debug(privring, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat); +} + +void +gk104_privring_intr(struct nvkm_subdev *privring) +{ + struct nvkm_device *device = privring->device; + u32 intr0 = nvkm_rd32(device, 0x120058); + u32 intr1 = nvkm_rd32(device, 0x12005c); + u32 hubnr = nvkm_rd32(device, 0x120070); + u32 ropnr = nvkm_rd32(device, 0x120074); + u32 gpcnr = nvkm_rd32(device, 0x120078); + u32 i; + + for (i = 0; (intr0 & 0x0000ff00) && i < hubnr; i++) { + u32 stat = 0x00000100 << i; + if (intr0 & stat) { + gk104_privring_intr_hub(privring, i); + intr0 &= ~stat; + } + } + + for (i = 0; (intr0 & 0xffff0000) && i < ropnr; i++) { + u32 stat = 0x00010000 << i; + if (intr0 & stat) { + gk104_privring_intr_rop(privring, i); + intr0 &= ~stat; + } + } + + for (i = 0; intr1 && i < gpcnr; i++) { + u32 stat = 0x00000001 << i; + if (intr1 & stat) { + gk104_privring_intr_gpc(privring, i); + intr1 &= ~stat; + } + } + + nvkm_mask(device, 0x12004c, 0x0000003f, 0x00000002); + nvkm_msec(device, 2000, + if (!(nvkm_rd32(device, 0x12004c) & 0x0000003f)) + break; + ); +} + +static int +gk104_privring_init(struct nvkm_subdev *privring) +{ + struct nvkm_device *device = privring->device; + nvkm_mask(device, 0x122318, 0x0003ffff, 0x00001000); + nvkm_mask(device, 0x12231c, 0x0003ffff, 0x00000200); + nvkm_mask(device, 0x122310, 0x0003ffff, 0x00000800); + nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000100); + nvkm_mask(device, 0x1223b0, 0x0003ffff, 0x00000fff); + nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000200); + nvkm_mask(device, 0x122358, 0x0003ffff, 0x00002880); + return 0; +} + +static const struct nvkm_subdev_func +gk104_privring = { + .preinit = gk104_privring_init, + .init = gk104_privring_init, + .intr = gk104_privring_intr, +}; + +int +gk104_privring_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, + struct nvkm_subdev **pprivring) +{ + return nvkm_subdev_new_(&gk104_privring, device, type, inst, pprivring); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk20a.c new file mode 100644 index 0000000000000..55e4a60d87700 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk20a.c @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#include +#include + +static void +gk20a_privring_init_privring_ring(struct nvkm_subdev *privring) +{ + struct nvkm_device *device = privring->device; + nvkm_mask(device, 0x137250, 0x3f, 0); + + nvkm_mask(device, 0x000200, 0x20, 0); + udelay(20); + nvkm_mask(device, 0x000200, 0x20, 0x20); + + nvkm_wr32(device, 0x12004c, 0x4); + nvkm_wr32(device, 0x122204, 0x2); + nvkm_rd32(device, 0x122204); + + /* + * Bug: increase clock timeout to avoid operation failure at high + * gpcclk rate. + */ + nvkm_wr32(device, 0x122354, 0x800); + nvkm_wr32(device, 0x128328, 0x800); + nvkm_wr32(device, 0x124320, 0x800); +} + +static void +gk20a_privring_intr(struct nvkm_subdev *privring) +{ + struct nvkm_device *device = privring->device; + u32 status0 = nvkm_rd32(device, 0x120058); + + if (status0 & 0x7) { + nvkm_debug(privring, "resetting privring ring\n"); + gk20a_privring_init_privring_ring(privring); + } + + /* Acknowledge interrupt */ + nvkm_mask(device, 0x12004c, 0x2, 0x2); + nvkm_msec(device, 2000, + if (!(nvkm_rd32(device, 0x12004c) & 0x0000003f)) + break; + ); +} + +static int +gk20a_privring_init(struct nvkm_subdev *privring) +{ + gk20a_privring_init_privring_ring(privring); + return 0; +} + +static const struct nvkm_subdev_func +gk20a_privring = { + .init = gk20a_privring_init, + .intr = gk20a_privring_intr, +}; + +int +gk20a_privring_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, + struct nvkm_subdev **pprivring) +{ + return nvkm_subdev_new_(&gk20a_privring, device, type, inst, pprivring); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gm200.c b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gm200.c new file mode 100644 index 0000000000000..b4eaf6db36d72 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gm200.c @@ -0,0 +1,36 @@ +/* + * Copyright 2015 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Ben Skeggs + */ +#include "priv.h" + +static const struct nvkm_subdev_func +gm200_privring = { + .intr = gk104_privring_intr, +}; + +int +gm200_privring_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, + struct nvkm_subdev **pprivring) +{ + return nvkm_subdev_new_(&gm200_privring, device, type, inst, pprivring); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gp10b.c b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gp10b.c new file mode 100644 index 0000000000000..4534111cf9074 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/gp10b.c @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#include + +#include "priv.h" + +static int +gp10b_privring_init(struct nvkm_subdev *privring) +{ + struct nvkm_device *device = privring->device; + + nvkm_wr32(device, 0x1200a8, 0x0); + + /* init ring */ + nvkm_wr32(device, 0x12004c, 0x4); + nvkm_wr32(device, 0x122204, 0x2); + nvkm_rd32(device, 0x122204); + + /* timeout configuration */ + nvkm_wr32(device, 0x009080, 0x800186a0); + + return 0; +} + +static const struct nvkm_subdev_func +gp10b_privring = { + .init = gp10b_privring_init, + .intr = gk104_privring_intr, +}; + +int +gp10b_privring_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, + struct nvkm_subdev **pprivring) +{ + return nvkm_subdev_new_(&gp10b_privring, device, type, inst, pprivring); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/privring/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/priv.h new file mode 100644 index 0000000000000..b378c14bc8dc7 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/privring/priv.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: MIT */ +#ifndef __NVKM_PRIVRING_PRIV_H__ +#define __NVKM_PRIVRING_PRIV_H__ +#include + +void gf100_privring_intr(struct nvkm_subdev *); +void gk104_privring_intr(struct nvkm_subdev *); +#endif